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Commit d92bb74d authored by Andhavarapu Karthik's avatar Andhavarapu Karthik
Browse files

disp: msm: sde: add rev check for mdp in yupik target



Add required revision checks for mdp in yupik target.

Change-Id: I2747a0addfb3b4880397d56b18a9e9aa9644df34
Signed-off-by: default avatarAndhavarapu Karthik <kartkart@codeaurora.org>
parent 8acd9ca0
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+20 −0
Original line number Diff line number Diff line
@@ -4804,6 +4804,26 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
		sde_cfg->mdss_hw_block_size = 0x158;
		sde_cfg->has_trusted_vm_support = true;
		sde_cfg->syscache_supported = true;
	} else if (IS_YUPIK_TARGET(hw_rev)) {
		sde_cfg->has_cwb_support = true;
		sde_cfg->has_qsync = true;
		sde_cfg->perf.min_prefill_lines = 40;
		sde_cfg->vbif_qos_nlvl = 8;
		sde_cfg->ts_prefill_rev = 2;
		sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;
		sde_cfg->delay_prg_fetch_start = true;
		sde_cfg->sui_ns_allowed = true;
		sde_cfg->sui_misr_supported = true;
		sde_cfg->sui_block_xin_mask = 0x261;
		sde_cfg->has_sui_blendstage = true;
		sde_cfg->has_3d_merge_reset = true;
		sde_cfg->has_vig_p010 = true;
		sde_cfg->true_inline_rot_rev = SDE_INLINE_ROT_VERSION_2_0_0;
		sde_cfg->uidle_cfg.uidle_rev = SDE_UIDLE_VERSION_1_0_1;
		sde_cfg->vbif_disable_inner_outer_shareable = true;
		sde_cfg->dither_luma_mode_support = true;
		sde_cfg->mdss_hw_block_size = 0x158;
		sde_cfg->has_trusted_vm_support = true;
	} else {
		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);
		sde_cfg->perf.min_prefill_lines = 0xffff;
+2 −0
Original line number Diff line number Diff line
@@ -47,6 +47,7 @@
#define SDE_HW_VER_660	SDE_HW_VER(6, 6, 0) /* holi */
#define SDE_HW_VER_670	SDE_HW_VER(6, 7, 0) /* shima */
#define SDE_HW_VER_700	SDE_HW_VER(7, 0, 0) /* lahaina */
#define SDE_HW_VER_720	SDE_HW_VER(7, 2, 0) /* yupik */

/* Avoid using below IS_XXX macros outside catalog, use feature bit instead */
#define IS_SDE_MAJOR_SAME(rev1, rev2)   \
@@ -71,6 +72,7 @@
#define IS_HOLI_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_660)
#define IS_SHIMA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_670)
#define IS_LAHAINA_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_700)
#define IS_YUPIK_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_720)

#define SDE_HW_BLK_NAME_LEN	16