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Commit d8ded50f authored by Andy Shevchenko's avatar Andy Shevchenko Committed by Vinod Koul
Browse files

dmaengine: dw: define DW_DMA_MAX_NR_MASTERS 



Instead of using magic number in the code the patch provides
DW_DMA_MAX_NR_MASTERS constant.

While here, restrict the reading of data width array by amount of the actual
number of AHB masters.

Signed-off-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent cfd8fef3

Documentation/devicetree/bindings/dma/snps-dma.txt

+1 −1
Original line number Diff line number Diff line
@@ -38,7 +38,7 @@ Example: 
		chan_allocation_order = <1>;

		chan_priority = <1>;

		block_size = <0xfff>;

		data_width = <3 3 0 0>;

		data_width = <3 3>;

	};



DMA clients connected to the Designware DMA controller must use the format

arch/arc/boot/dts/abilis_tb10x.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -112,7 +112,7 @@ 
			chan_allocation_order = <0>;

			chan_priority = <1>;

			block_size = <0x7ff>;

			data_width = <2 0 0 0>;

			data_width = <2>;

			clocks = <&ahb_clk>;

			clock-names = "hclk";

		};

arch/arm/boot/dts/spear13xx.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ 
			chan_priority = <1>;

			block_size = <0xfff>;

			dma-masters = <2>;

			data_width = <3 3 0 0>;

			data_width = <3 3>;

		};



		dma@eb000000 {
@@ -133,7 +133,7 @@ 
			chan_allocation_order = <1>;

			chan_priority = <1>;

			block_size = <0xfff>;

			data_width = <3 3 0 0>;

			data_width = <3 3>;

		};



		fsmc: flash@b0000000 {

arch/avr32/mach-at32ap/at32ap700x.c

+1 −1
Original line number Diff line number Diff line
@@ -607,7 +607,7 @@ static struct dw_dma_platform_data dw_dmac0_data = { 
	.nr_channels	= 3,

	.block_size	= 4095U,

	.nr_masters	= 2,

	.data_width	= { 2, 2, 0, 0 },

	.data_width	= { 2, 2 },

};



static struct resource dw_dmac0_resource[] = {

drivers/dma/dw/core.c

+2 −1
Original line number Diff line number Diff line
@@ -1562,7 +1562,8 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) 
		}

	} else {

		dw->nr_masters = pdata->nr_masters;

		memcpy(dw->data_width, pdata->data_width, 4);

		for (i = 0; i < dw->nr_masters; i++)

			dw->data_width[i] = pdata->data_width[i];

	}



	/* Calculate all channel mask before DMA setup */