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Commit d8010ceb authored by Kevin Cernekee's avatar Kevin Cernekee Committed by Ralf Baechle
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MIPS: BMIPS: Let each platform customize the CPU1 IRQ mask 



On some chips like bcm3384, "other stuff" gets wired up to CPU1's IE_IRQ1
input, generating spurious IRQs.  In this case we want the platform code
to be able to mask it off.

Signed-off-by: default avatarKevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: mbizon@freebox.fr
Cc: jogo@openwrt.org
Cc: jfraser@broadcom.com
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8163/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent bbf2ba67

arch/mips/include/asm/bmips.h

+1 −0
Original line number Diff line number Diff line
@@ -84,6 +84,7 @@ extern char bmips_smp_int_vec_end; 
extern int bmips_smp_enabled;

extern int bmips_cpu_offset;

extern cpumask_t bmips_booted_mask;

extern unsigned long bmips_tp1_irqs;



extern void bmips_ebase_setup(void);

extern asmlinkage void plat_wired_tlb_setup(void);

arch/mips/kernel/smp-bmips.c

+4 −2
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ static int __maybe_unused max_cpus = 1; 
int bmips_smp_enabled = 1;

int bmips_cpu_offset;

cpumask_t bmips_booted_mask;

unsigned long bmips_tp1_irqs = IE_IRQ1;



#define RESET_FROM_KSEG0		0x80080800

#define RESET_FROM_KSEG1		0xa0080800
@@ -257,7 +258,7 @@ static void bmips_smp_finish(void) 
	write_c0_compare(read_c0_count() + mips_hpt_frequency / HZ);



	irq_enable_hazard();

	set_c0_status(IE_SW0 | IE_SW1 | IE_IRQ1 | IE_IRQ5 | ST0_IE);

	set_c0_status(IE_SW0 | IE_SW1 | bmips_tp1_irqs | IE_IRQ5 | ST0_IE);

	irq_enable_hazard();

}
@@ -387,7 +388,8 @@ void __ref play_dead(void) 
	 * IRQ handlers; this clears ST0_IE and returns immediately.

	 */

	clear_c0_cause(CAUSEF_IV | C_SW0 | C_SW1);

	change_c0_status(IE_IRQ5 | IE_IRQ1 | IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV,

	change_c0_status(

		IE_IRQ5 | bmips_tp1_irqs | IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV,

		IE_SW0 | IE_SW1 | ST0_IE | ST0_BEV);

	irq_disable_hazard();