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Commit d7ab992c authored by Min He's avatar Min He Committed by Chris Wilson
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drm/i915: fix the dequeue logic for single_port_submission context 



For a single_port_submission context, GVT expects that it can only be
submitted to port 0, and there shouldn't be any other context in port 1
at the same time. This is required by GVT-g context to have an opportunity
to save/restore some non-hw context render registers.

This patch is to workaround GVT-g.

v2: optimized code by following Chris's advice, and added more comments to
explain the patch.
v3: followed the coding style.

Signed-off-by: default avatarMin He <min.he@intel.com>
Reviewed-by: default avatarZhenyu Wang <zhenyuw@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/1479305104-17049-1-git-send-email-min.he@intel.com
parent 27745e82

drivers/gpu/drm/i915/intel_lrc.c

+2 −1
Original line number Diff line number Diff line
@@ -499,7 +499,8 @@ static void execlists_dequeue(struct intel_engine_cs *engine) 
			 * context (even though a different request) to

			 * the second port.

			 */

			if (ctx_single_port_submission(cursor->ctx))

			if (ctx_single_port_submission(last->ctx) ||

			    ctx_single_port_submission(cursor->ctx))

				break;



			GEM_BUG_ON(last->ctx == cursor->ctx);