Commit d7a304e9 authored Jul 14, 2015 by Stephen Boyd

clk: qcom: Set CLK_SET_RATE_PARENT on ce1 clocks



The other ce clocks have the flag set, but ce1 doesn't, so
clk_set_rate() doesn't propagate up the tree to the ce1_src_clk.
Set the flag as this is supported.

Reported-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Tested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Fixes: 02824653 ("clk: qcom: Add APQ8084 Global Clock Controller support")
Fixes: d33faa9e ("clk: qcom: Add support for MSM8974's global clock controller (GCC)")
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>

parent c5e857a4

drivers/clk/qcom/gcc-apq8084.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -2105,6 +2105,7 @@ static struct clk_branch gcc_ce1_clk = {
		"ce1_clk_src",
		},
		.num_parents = 1,
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_branch2_ops,
		},
		},

drivers/clk/qcom/gcc-msm8974.c

+1 −0

Original line number	Diff line number	Diff line
		@@ -1783,6 +1783,7 @@ static struct clk_branch gcc_ce1_clk = {
		"ce1_clk_src",
		},
		.num_parents = 1,
		.flags = CLK_SET_RATE_PARENT,
		.ops = &clk_branch2_ops,
		},
		},