Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d76c9e24 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
Browse files

drm/amd/powerplay: Change the allocate method of dpm context for smu11. 



Change the allocate method of dpm context as dpm_table is different bewteen
vega20 and smu11.

Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHuang Rui <ray.huang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 00bfaec8

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+3 −0
Original line number Diff line number Diff line
@@ -190,6 +190,7 @@ struct smu_context 
};



struct pptable_funcs {

	int (*alloc_dpm_context)(struct smu_context *smu);

	int (*store_powerplay_table)(struct smu_context *smu);

	int (*check_powerplay_table)(struct smu_context *smu);

	int (*append_powerplay_table)(struct smu_context *smu);
@@ -273,6 +274,8 @@ struct smu_funcs 
	((smu)->funcs->send_smc_msg_with_param? (smu)->funcs->send_smc_msg_with_param((smu), (msg), (param)) : 0)

#define smu_read_smc_arg(smu, arg) \

	((smu)->funcs->read_smc_arg? (smu)->funcs->read_smc_arg((smu), (arg)) : 0)

#define smu_alloc_dpm_context(smu) \

	((smu)->ppt_funcs->alloc_dpm_context ? (smu)->ppt_funcs->alloc_dpm_context((smu)) : 0)

#define smu_store_powerplay_table(smu) \

	((smu)->ppt_funcs->store_powerplay_table ? (smu)->ppt_funcs->store_powerplay_table((smu)) : 0)

#define smu_check_powerplay_table(smu) \

drivers/gpu/drm/amd/powerplay/smu_v11_0.c

+1 −6
Original line number Diff line number Diff line
@@ -251,12 +251,7 @@ static int smu_v11_0_init_dpm_context(struct smu_context *smu) 
	if (smu_dpm->dpm_context || smu_dpm->dpm_context_size != 0)

		return -EINVAL;



	smu_dpm->dpm_context = kzalloc(sizeof(struct smu_11_0_dpm_context), GFP_KERNEL);

	if (!smu_dpm->dpm_context)

		return -ENOMEM;

	smu_dpm->dpm_context_size = sizeof(struct smu_11_0_dpm_context);



	return 0;

	return smu_alloc_dpm_context(smu);

}



static int smu_v11_0_fini_dpm_context(struct smu_context *smu)

drivers/gpu/drm/amd/powerplay/vega20_ppt.c

+15 −0
Original line number Diff line number Diff line
@@ -132,6 +132,20 @@ static int vega20_get_smu_msg_index(struct smu_context *smc, uint32_t index) 


}



static int vega20_allocate_dpm_context(struct smu_context *smu)

{

	struct smu_dpm_context *smu_dpm = &smu->smu_dpm;



	smu_dpm->dpm_context = kzalloc(sizeof(struct vega20_dpm_table),

				       GFP_KERNEL);

	if (!smu_dpm->dpm_context)

		return -ENOMEM;



	smu_dpm->dpm_context_size = sizeof(struct vega20_dpm_table);



	return 0;

}



static int vega20_store_powerplay_table(struct smu_context *smu)

{

	ATOM_Vega20_POWERPLAYTABLE *powerplay_table = NULL;
@@ -260,6 +274,7 @@ static int vega20_check_powerplay_table(struct smu_context *smu) 
}



static const struct pptable_funcs vega20_ppt_funcs = {

	.alloc_dpm_context = vega20_allocate_dpm_context,

	.store_powerplay_table = vega20_store_powerplay_table,

	.check_powerplay_table = vega20_check_powerplay_table,

	.append_powerplay_table = vega20_append_powerplay_table,

drivers/gpu/drm/amd/powerplay/vega20_ppt.h

+44 −0
Original line number Diff line number Diff line
@@ -23,6 +23,50 @@ 
#ifndef __VEGA20_PPT_H__

#define __VEGA20_PPT_H__



#define MAX_REGULAR_DPM_NUMBER 16

#define MAX_PCIE_CONF 2



struct vega20_dpm_level {

        bool            enabled;

        uint32_t        value;

        uint32_t        param1;

};



struct vega20_dpm_state {

        uint32_t  soft_min_level;

        uint32_t  soft_max_level;

        uint32_t  hard_min_level;

        uint32_t  hard_max_level;

};



struct vega20_single_dpm_table {

        uint32_t                count;

        struct vega20_dpm_state dpm_state;

        struct vega20_dpm_level dpm_levels[MAX_REGULAR_DPM_NUMBER];

};



struct vega20_pcie_table {

        uint16_t count;

        uint8_t  pcie_gen[MAX_PCIE_CONF];

        uint8_t  pcie_lane[MAX_PCIE_CONF];

        uint32_t lclk[MAX_PCIE_CONF];

};



struct vega20_dpm_table {

	struct vega20_single_dpm_table  soc_table;

        struct vega20_single_dpm_table  gfx_table;

        struct vega20_single_dpm_table  mem_table;

        struct vega20_single_dpm_table  eclk_table;

        struct vega20_single_dpm_table  vclk_table;

        struct vega20_single_dpm_table  dclk_table;

        struct vega20_single_dpm_table  dcef_table;

        struct vega20_single_dpm_table  pixel_table;

        struct vega20_single_dpm_table  display_table;

        struct vega20_single_dpm_table  phy_table;

        struct vega20_single_dpm_table  fclk_table;

        struct vega20_pcie_table        pcie_table;

};



extern void vega20_set_ppt_funcs(struct smu_context *smu);



#endif