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Commit d73aba11 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'drm-fixes-2019-01-25-1' of git://anongit.freedesktop.org/drm/drm 

Pull drm fixes from Dave Airlie:
 "Live from LCA pull, some fixes all over the place,

  i915:
   - GVT workload destruction fix

  msm:
   - A6XX opp-level fix
   - build fixes
   - hard-coded irq removal

  amdgpu:
   - overclocking fix
   - hybrid gfx fix

  sun4i:
   - fix TMDS clock usage"

* tag 'drm-fixes-2019-01-25-1' of git://anongit.freedesktop.org/drm/drm:
  drm/msm: avoid unused function warning
  drm/msm: Add __printf verification
  drm/msm: Fix A6XX support for opp-level
  drm/msm: honor GPU_READONLY flag
  drm/msm: drop interrupt-names
  drm/msm/gpu: Remove hardcoded interrupt name
  drm/msm/gpu: fix building without debugfs
  drm/i915/execlists: Mark up priority boost on preemption
  drm/i915/gvt: release shadow batch buffer and wa_ctx before destroy one workload
  drm/sun4i: hdmi: Fix usage of TMDS clock
  drm/amd/powerplay: OD setting fix on Vega10
  drm/amdgpu: Add APTX quirk for Lenovo laptop
  drm/msm: Unblock writer if reader closes file
parents cffd425b f0e7ce1e

Documentation/devicetree/bindings/display/msm/gpu.txt

+0 −1
Original line number Diff line number Diff line
@@ -27,7 +27,6 @@ Example: 
		reg = <0x04300000 0x20000>;

		reg-names = "kgsl_3d0_reg_memory";

		interrupts = <GIC_SPI 80 0>;

		interrupt-names = "kgsl_3d0_irq";

		clock-names =

		    "core",

		    "iface",

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c

+1 −0
Original line number Diff line number Diff line
@@ -576,6 +576,7 @@ static const struct amdgpu_px_quirk amdgpu_px_quirk_list[] = { 
	{ 0x1002, 0x6900, 0x1028, 0x0812, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x1028, 0x0813, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x1025, 0x125A, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0x1002, 0x6900, 0x17AA, 0x3806, AMDGPU_PX_QUIRK_FORCE_ATPX },

	{ 0, 0, 0, 0, 0 },

};

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_processpptables.c

+21 −1
Original line number Diff line number Diff line
@@ -32,6 +32,7 @@ 
#include "vega10_pptable.h"



#define NUM_DSPCLK_LEVELS 8

#define VEGA10_ENGINECLOCK_HARDMAX 198000



static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,

		enum phm_platform_caps cap)
@@ -258,6 +259,25 @@ static int init_over_drive_limits( 
		struct pp_hwmgr *hwmgr,

		const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)

{

	const ATOM_Vega10_GFXCLK_Dependency_Table *gfxclk_dep_table =

			(const ATOM_Vega10_GFXCLK_Dependency_Table *)

			(((unsigned long) powerplay_table) +

			le16_to_cpu(powerplay_table->usGfxclkDependencyTableOffset));

	bool is_acg_enabled = false;

	ATOM_Vega10_GFXCLK_Dependency_Record_V2 *patom_record_v2;



	if (gfxclk_dep_table->ucRevId == 1) {

		patom_record_v2 =

			(ATOM_Vega10_GFXCLK_Dependency_Record_V2 *)gfxclk_dep_table->entries;

		is_acg_enabled =

			(bool)patom_record_v2[gfxclk_dep_table->ucNumEntries-1].ucACGEnable;

	}



	if (powerplay_table->ulMaxODEngineClock > VEGA10_ENGINECLOCK_HARDMAX &&

		!is_acg_enabled)

		hwmgr->platform_descriptor.overdriveLimit.engineClock =

			VEGA10_ENGINECLOCK_HARDMAX;

	else

		hwmgr->platform_descriptor.overdriveLimit.engineClock =

			le32_to_cpu(powerplay_table->ulMaxODEngineClock);

	hwmgr->platform_descriptor.overdriveLimit.memoryClock =

drivers/gpu/drm/i915/gvt/scheduler.c

+6 −5
Original line number Diff line number Diff line
@@ -332,6 +332,9 @@ static void release_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx) 


	i915_gem_object_unpin_map(wa_ctx->indirect_ctx.obj);

	i915_gem_object_put(wa_ctx->indirect_ctx.obj);



	wa_ctx->indirect_ctx.obj = NULL;

	wa_ctx->indirect_ctx.shadow_va = NULL;

}



static int set_context_ppgtt_from_shadow(struct intel_vgpu_workload *workload,
@@ -911,11 +914,6 @@ static void complete_current_workload(struct intel_gvt *gvt, int ring_id) 


	list_del_init(&workload->list);



	if (!workload->status) {

		release_shadow_batch_buffer(workload);

		release_shadow_wa_ctx(&workload->wa_ctx);

	}



	if (workload->status || (vgpu->resetting_eng & ENGINE_MASK(ring_id))) {

		/* if workload->status is not successful means HW GPU

		 * has occurred GPU hang or something wrong with i915/GVT,
@@ -1283,6 +1281,9 @@ void intel_vgpu_destroy_workload(struct intel_vgpu_workload *workload) 
{

	struct intel_vgpu_submission *s = &workload->vgpu->submission;



	release_shadow_batch_buffer(workload);

	release_shadow_wa_ctx(&workload->wa_ctx);



	if (workload->shadow_mm)

		intel_vgpu_mm_put(workload->shadow_mm);

drivers/gpu/drm/i915/intel_lrc.c

+4 −0
Original line number Diff line number Diff line
@@ -303,6 +303,7 @@ static void __unwind_incomplete_requests(struct intel_engine_cs *engine) 
	 */

	if (!(prio & I915_PRIORITY_NEWCLIENT)) {

		prio |= I915_PRIORITY_NEWCLIENT;

		active->sched.attr.priority = prio;

		list_move_tail(&active->sched.link,

			       i915_sched_lookup_priolist(engine, prio));

	}
@@ -645,6 +646,9 @@ static void execlists_dequeue(struct intel_engine_cs *engine) 
		int i;



		priolist_for_each_request_consume(rq, rn, p, i) {

			GEM_BUG_ON(last &&

				   need_preempt(engine, last, rq_prio(rq)));



			/*

			 * Can we combine this request with the current port?

			 * It has to be the same context/ringbuffer and not