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Commit d6d41ba1 authored by Mauro Carvalho Chehab's avatar Mauro Carvalho Chehab
Browse files

Merge remote-tracking branch 'linus/master' into patchwork 

Merge back media fixes applied upstream.

* linus/master: (457 commits)
  Linux 3.18-rc2
  ARM: dts: imx28-evk: Let i2c0 run at 100kHz
  ARM: i.MX6: Fix "emi" clock name typo
  overlayfs: embed middle into overlay_readdir_data
  overlayfs: embed root into overlay_readdir_data
  overlayfs: make ovl_cache_entry->name an array instead of pointer
  overlayfs: don't hold ->i_mutex over opening the real directory
  arm64: Fix memblock current_limit with 64K pages and 48-bit VA
  sparc64: Implement __get_user_pages_fast().
  sparc64: Fix register corruption in top-most kernel stack frame during boot.
  arm64: ASLR: Don't randomise text when randomise_va_space == 0
  [media] s5p-jpeg: Avoid -Wuninitialized warning in s5p_jpeg_parse_hdr
  [media] s5p-fimc: Only build suspend/resume for PM
  [media] s5p-jpeg: Only build suspend/resume for PM
  [media] Remove references to non-existent PLAT_S5P symbol
  MIPS: SEAD3: Fix I2C device registration.
  [media] videobuf-dma-contig: set vm_pgoff to be zero to pass the sanity check in vm_iomap_memory()
  [media] tw68: remove bogus I2C_ALGOBIT dependency
  kvm: vfio: fix unregister kvm_device_ops of vfio
  KVM: x86: Wrong assertion on paging_tmpl.h
  ...
parents 1ef24960 f7e87a44

Documentation/DocBook/media/v4l/compat.xml

+4 −0
Original line number Diff line number Diff line
@@ -2566,6 +2566,10 @@ fields changed from _s32 to _u32. 
	  <para>Added compound control types and &VIDIOC-QUERY-EXT-CTRL;.

	  </para>

        </listitem>

      </orderedlist>

    </section>



    <section>

      <title>V4L2 in Linux 3.18</title>

      <orderedlist>

	<listitem>

Documentation/arm64/memory.txt

+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ User addresses have bits 63:48 set to 0 while the kernel addresses have 
the same bits set to 1. TTBRx selection is given by bit 63 of the

virtual address. The swapper_pg_dir contains only kernel (global)

mappings while the user pgd contains only user (non-global) mappings.

The swapper_pgd_dir address is written to TTBR1 and never written to

The swapper_pg_dir address is written to TTBR1 and never written to

TTBR0.

Documentation/devicetree/bindings/mailbox/mailbox.txt

0 → 100644
+38 −0
Original line number Diff line number Diff line 
* Generic Mailbox Controller and client driver bindings



Generic binding to provide a way for Mailbox controller drivers to

assign appropriate mailbox channel to client drivers.



* Mailbox Controller



Required property:

- #mbox-cells: Must be at least 1. Number of cells in a mailbox

		specifier.



Example:

	mailbox: mailbox {

		...

		#mbox-cells = <1>;

	};





* Mailbox Client



Required property:

- mboxes: List of phandle and mailbox channel specifiers.



Optional property:

- mbox-names: List of identifier strings for each mailbox channel

		required by the client. The use of this property

		is discouraged in favor of using index in list of

		'mboxes' while requesting a mailbox. Instead the

		platforms may define channel indices, in DT headers,

		to something legible.



Example:

	pwr_cntrl: power {

		...

		mbox-names = "pwr-ctrl", "rpc";

		mboxes = <&mailbox 0

			&mailbox 1>;

	};

Documentation/devicetree/bindings/pwm/pwm-fsl-ftm.txt

+18 −1
Original line number Diff line number Diff line 
Freescale FlexTimer Module (FTM) PWM controller



The same FTM PWM device can have a different endianness on different SoCs. The

device tree provides a property to describing this so that an operating system

device driver can handle all variants of the device. Refer to the table below

for the endianness of the FTM PWM block as integrated into the existing SoCs:



	SoC     | FTM-PWM endianness

	--------+-------------------

	Vybrid  | LE

	LS1     | BE

	LS2     | LE



Please see ../regmap/regmap.txt for more detail about how to specify endian

modes in device tree.





Required properties:

- compatible: Should be "fsl,vf610-ftm-pwm".

- reg: Physical base address and length of the controller's registers
@@ -16,7 +31,8 @@ Required properties: 
- pinctrl-names: Must contain a "default" entry.

- pinctrl-NNN: One property must exist for each entry in pinctrl-names.

  See pinctrl/pinctrl-bindings.txt for details of the property values.



- big-endian: Boolean property, required if the FTM PWM registers use a big-

  endian rather than little-endian layout.



Example:
@@ -32,4 +48,5 @@ pwm0: pwm@40038000 { 
			<&clks VF610_CLK_FTM0_EXT_FIX_EN>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_pwm0_1>;

		big-endian;

};

Documentation/devicetree/bindings/pwm/pwm-rockchip.txt

+2 −2
Original line number Diff line number Diff line
@@ -7,8 +7,8 @@ Required properties: 
   "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC

 - reg: physical base address and length of the controller's registers

 - clocks: phandle and clock specifier of the PWM reference clock

 - #pwm-cells: should be 2. See pwm.txt in this directory for a

   description of the cell format.

 - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory

   for a description of the cell format.



Example: