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Commit d6a32277 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'dmaengine-4.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma 

Pull dmaengine updates from Vinod Koul:
 "This round we have few new features, new driver and updates to few
  drivers.

  The new features to dmaengine core are:
   - Synchronized transfer termination API to terminate the dmaengine
     transfers in synchronized and async fashion as required by users.
     We have its user now in ALSA dmaengine lib, img, at_xdma, axi_dmac
     drivers.
   - Universal API for channel request and start consolidation of
     request flows.  It's user is ompa-dma driver.
   - Introduce reuse of descriptors and use in pxa_dma driver

  Add/Remove:
   - New STM32 DMA driver
   - Removal of unused R-Car HPB-DMAC driver

  Updates:
   - ti-dma-crossbar updates for supporting eDMA
   - tegra-apb pm updates
   - idma64
   - mv_xor updates
   - ste_dma updates"

* tag 'dmaengine-4.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (54 commits)
  dmaengine: mv_xor: add suspend/resume support
  dmaengine: mv_xor: de-duplicate mv_chan_set_mode*()
  dmaengine: mv_xor: remove mv_xor_chan->current_type field
  dmaengine: omap-dma: Add support for DMA filter mapping to slave devices
  dmaengine: edma: Add support for DMA filter mapping to slave devices
  dmaengine: core: Introduce new, universal API to request a channel
  dmaengine: core: Move and merge the code paths using private_candidate
  dmaengine: core: Skip mask matching when it is not provided to private_candidate
  dmaengine: mdc: Correct terminate_all handling
  dmaengine: edma: Add probe callback to edma_tptc_driver
  dmaengine: dw: fix potential memory leak in dw_dma_parse_dt()
  dmaengine: stm32-dma: Fix unchecked deference of chan->desc
  dmaengine: sh: Remove unused R-Car HPB-DMAC driver
  dmaengine: usb-dmac: Document SoC specific compatibility strings
  ste_dma40: Delete an unnecessary variable initialisation in d40_probe()
  ste_dma40: Delete another unnecessary check in d40_probe()
  ste_dma40: Delete an unnecessary check before the function call "kmem_cache_destroy"
  dmaengine: tegra-apb: Free interrupts before killing tasklets
  dmaengine: tegra-apb: Update driver to use GFP_NOWAIT
  dmaengine: tegra-apb: Only save channel state for those in use
  ...
parents 4c257ec3 8b648436

Documentation/devicetree/bindings/dma/renesas,usb-dmac.txt

+8 −2
Original line number Diff line number Diff line 
* Renesas USB DMA Controller Device Tree bindings



Required Properties:

- compatible: must contain "renesas,usb-dmac"

-compatible: "renesas,<soctype>-usb-dmac", "renesas,usb-dmac" as fallback.

	Examples with soctypes are:

	  - "renesas,r8a7790-usb-dmac" (R-Car H2)

	  - "renesas,r8a7791-usb-dmac" (R-Car M2-W)

	  - "renesas,r8a7793-usb-dmac" (R-Car M2-N)

	  - "renesas,r8a7794-usb-dmac" (R-Car E2)

	  - "renesas,r8a7795-usb-dmac" (R-Car H3)

- reg: base address and length of the registers block for the DMAC

- interrupts: interrupt specifiers for the DMAC, one for each entry in

  interrupt-names.
@@ -15,7 +21,7 @@ Required Properties: 
Example: R8A7790 (R-Car H2) USB-DMACs



	usb_dmac0: dma-controller@e65a0000 {

		compatible = "renesas,usb-dmac";

		compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";

		reg = <0 0xe65a0000 0 0x100>;

		interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH

			      0 109 IRQ_TYPE_LEVEL_HIGH>;

Documentation/devicetree/bindings/dma/stm32-dma.txt

0 → 100644
+82 −0
Original line number Diff line number Diff line 
* STMicroelectronics STM32 DMA controller



The STM32 DMA is a general-purpose direct memory access controller capable of

supporting 8 independent DMA channels. Each channel can have up to 8 requests.



Required properties:

- compatible: Should be "st,stm32-dma"

- reg: Should contain DMA registers location and length. This should include

  all of the per-channel registers.

- interrupts: Should contain all of the per-channel DMA interrupts in

  ascending order with respect to the DMA channel index.

- clocks: Should contain the input clock of the DMA instance.

- #dma-cells : Must be <4>. See DMA client paragraph for more details.



Optional properties:

- resets: Reference to a reset controller asserting the DMA controller

- st,mem2mem: boolean; if defined, it indicates that the controller supports

  memory-to-memory transfer



Example:



	dma2: dma-controller@40026400 {

		compatible = "st,stm32-dma";

		reg = <0x40026400 0x400>;

		interrupts = <56>,

			     <57>,

			     <58>,

			     <59>,

			     <60>,

			     <68>,

			     <69>,

			     <70>;

		clocks = <&clk_hclk>;

		#dma-cells = <4>;

		st,mem2mem;

		resets = <&rcc 150>;

	};



* DMA client



DMA clients connected to the STM32 DMA controller must use the format

described in the dma.txt file, using a five-cell specifier for each

channel: a phandle plus four integer cells.

The four cells in order are:



1. The channel id

2. The request line number

3. A 32bit mask specifying the DMA channel configuration which are device

   dependent:

  -bit 9: Peripheral Increment Address

	0x0: no address increment between transfers

	0x1: increment address between transfers

 -bit 10: Memory Increment Address

	0x0: no address increment between transfers

	0x1: increment address between transfers

 -bit 15: Peripheral Increment Offset Size

	0x0: offset size is linked to the peripheral bus width

	0x1: offset size is fixed to 4 (32-bit alignment)

 -bit 16-17: Priority level

	0x0: low

	0x1: medium

	0x2: high

	0x3: very high

5. A 32bit mask specifying the DMA FIFO threshold configuration which are device

   dependent:

 -bit 0-1: Fifo threshold

	0x0: 1/4 full FIFO

	0x1: 1/2 full FIFO

	0x2: 3/4 full FIFO

	0x3: full FIFO



Example:



	usart1: serial@40011000 {

		compatible = "st,stm32-usart", "st,stm32-uart";

		reg = <0x40011000 0x400>;

		interrupts = <37>;

		clocks = <&clk_pclk2>;

		dmas = <&dma2 2 4 0x10400 0x3>,

		       <&dma2 7 5 0x10200 0x3>;

		dma-names = "rx", "tx";

	};

Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt

+6 −0
Original line number Diff line number Diff line
@@ -14,6 +14,10 @@ The DMA controller node need to have the following poroperties: 


Optional properties:

- ti,dma-safe-map: Safe routing value for unused request lines

- ti,reserved-dma-request-ranges: DMA request ranges which should not be used

		when mapping xbar input to DMA request, they are either

		allocated to be used by for example the DSP or they are used as

		memcpy channels in eDMA.



Notes:

When requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request
@@ -46,6 +50,8 @@ sdma_xbar: dma-router@4a002b78 { 
	#dma-cells = <1>;

	dma-requests = <205>;

	ti,dma-safe-map = <0>;

	/* Protect the sDMA request ranges: 10-14 and 100-126 */

	ti,reserved-dma-request-ranges = <10 5>, <100 27>;

	dma-masters = <&sdma>;

};

Documentation/dmaengine/client.txt

+41 −18
Original line number Diff line number Diff line
@@ -22,25 +22,14 @@ The slave DMA usage consists of following steps: 
   Channel allocation is slightly different in the slave DMA context,

   client drivers typically need a channel from a particular DMA

   controller only and even in some cases a specific channel is desired.

   To request a channel dma_request_channel() API is used.

   To request a channel dma_request_chan() API is used.



   Interface:

	struct dma_chan *dma_request_channel(dma_cap_mask_t mask,

			dma_filter_fn filter_fn,

			void *filter_param);

   where dma_filter_fn is defined as:

	typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);

	struct dma_chan *dma_request_chan(struct device *dev, const char *name);



   The 'filter_fn' parameter is optional, but highly recommended for

   slave and cyclic channels as they typically need to obtain a specific

   DMA channel.



   When the optional 'filter_fn' parameter is NULL, dma_request_channel()

   simply returns the first channel that satisfies the capability mask.



   Otherwise, the 'filter_fn' routine will be called once for each free

   channel which has a capability in 'mask'.  'filter_fn' is expected to

   return 'true' when the desired DMA channel is found.

   Which will find and return the 'name' DMA channel associated with the 'dev'

   device. The association is done via DT, ACPI or board file based

   dma_slave_map matching table.



   A channel allocated via this interface is exclusive to the caller,

   until dma_release_channel() is called.
@@ -128,7 +117,7 @@ The slave DMA usage consists of following steps: 
	transaction.



	For cyclic DMA, a callback function may wish to terminate the

	DMA via dmaengine_terminate_all().

	DMA via dmaengine_terminate_async().



	Therefore, it is important that DMA engine drivers drop any

	locks before calling the callback function which may cause a
@@ -166,12 +155,29 @@ The slave DMA usage consists of following steps: 


Further APIs:



1. int dmaengine_terminate_all(struct dma_chan *chan)

1. int dmaengine_terminate_sync(struct dma_chan *chan)

   int dmaengine_terminate_async(struct dma_chan *chan)

   int dmaengine_terminate_all(struct dma_chan *chan) /* DEPRECATED */



   This causes all activity for the DMA channel to be stopped, and may

   discard data in the DMA FIFO which hasn't been fully transferred.

   No callback functions will be called for any incomplete transfers.



   Two variants of this function are available.



   dmaengine_terminate_async() might not wait until the DMA has been fully

   stopped or until any running complete callbacks have finished. But it is

   possible to call dmaengine_terminate_async() from atomic context or from

   within a complete callback. dmaengine_synchronize() must be called before it

   is safe to free the memory accessed by the DMA transfer or free resources

   accessed from within the complete callback.



   dmaengine_terminate_sync() will wait for the transfer and any running

   complete callbacks to finish before it returns. But the function must not be

   called from atomic context or from within a complete callback.



   dmaengine_terminate_all() is deprecated and should not be used in new code.



2. int dmaengine_pause(struct dma_chan *chan)



   This pauses activity on the DMA channel without data loss.
@@ -197,3 +203,20 @@ Further APIs: 
	a running DMA channel.  It is recommended that DMA engine users

	pause or stop (via dmaengine_terminate_all()) the channel before

	using this API.



5. void dmaengine_synchronize(struct dma_chan *chan)



  Synchronize the termination of the DMA channel to the current context.



  This function should be used after dmaengine_terminate_async() to synchronize

  the termination of the DMA channel to the current context. The function will

  wait for the transfer and any running complete callbacks to finish before it

  returns.



  If dmaengine_terminate_async() is used to stop the DMA channel this function

  must be called before it is safe to free memory accessed by previously

  submitted descriptors or to free any resources accessed within the complete

  callback of previously submitted descriptors.



  The behavior of this function is undefined if dma_async_issue_pending() has

  been called between dmaengine_terminate_async() and this function.

Documentation/dmaengine/provider.txt

+18 −2
Original line number Diff line number Diff line
@@ -327,8 +327,24 @@ supported. 


   * device_terminate_all

     - Aborts all the pending and ongoing transfers on the channel

     - This command should operate synchronously on the channel,

       terminating right away all the channels

     - For aborted transfers the complete callback should not be called

     - Can be called from atomic context or from within a complete

       callback of a descriptor. Must not sleep. Drivers must be able

       to handle this correctly.

     - Termination may be asynchronous. The driver does not have to

       wait until the currently active transfer has completely stopped.

       See device_synchronize.



   * device_synchronize

     - Must synchronize the termination of a channel to the current

       context.

     - Must make sure that memory for previously submitted

       descriptors is no longer accessed by the DMA controller.

     - Must make sure that all complete callbacks for previously

       submitted descriptors have finished running and none are

       scheduled to run.

     - May sleep.





Misc notes (stuff that should be documented, but don't really know

where to put them)