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Commit d65ea48d authored by John David Anglin's avatar John David Anglin Committed by Helge Deller
Browse files

parisc: Use unshadowed index register for flush instructions in... 


parisc: Use unshadowed index register for flush instructions in flush_dcache_page_asm and flush_icache_page_asm

The comment at the start of pacache.S states that the base and index
registers used for fdc,fic, and pdc instructions should not use shadowed
registers. Although this is probably unnecessary for tmpalias flushes,
there is also no reason not to comply.

Signed-off-by: default avatarJohn David Anglin <dave.anglin@bell.net>
Signed-off-by: default avatarHelge Deller <deller@gmx.de>
parent 2cc7138f

arch/parisc/kernel/pacache.S

+38 −38
Original line number Original line Diff line number Diff line
@@ -860,7 +860,7 @@ ENTRY(flush_dcache_page_asm) 
#endif

#endif





	ldil		L%dcache_stride, %r1

	ldil		L%dcache_stride, %r1

	ldw		R%dcache_stride(%r1), %r1

	ldw		R%dcache_stride(%r1), r31





#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

	depdi,z		1, 63-PAGE_SHIFT,1, %r25

	depdi,z		1, 63-PAGE_SHIFT,1, %r25
@@ -868,26 +868,26 @@ ENTRY(flush_dcache_page_asm) 
	depwi,z		1, 31-PAGE_SHIFT,1, %r25

	depwi,z		1, 31-PAGE_SHIFT,1, %r25

#endif

#endif

	add		%r28, %r25, %r25

	add		%r28, %r25, %r25

	sub		%r25, %r1, %r25

	sub		%r25, r31, %r25









1:      fdc,m		%r1(%r28)

1:      fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)

	cmpb,COND(<<)		%r28, %r25,1b

	cmpb,COND(<<)		%r28, %r25,1b

	fdc,m		%r1(%r28)

	fdc,m		r31(%r28)





	sync

	sync
@@ -936,7 +936,7 @@ ENTRY(flush_icache_page_asm) 
#endif

#endif





	ldil		L%icache_stride, %r1

	ldil		L%icache_stride, %r1

	ldw		R%icache_stride(%r1), %r1

	ldw		R%icache_stride(%r1), %r31





#ifdef CONFIG_64BIT

#ifdef CONFIG_64BIT

	depdi,z		1, 63-PAGE_SHIFT,1, %r25

	depdi,z		1, 63-PAGE_SHIFT,1, %r25
@@ -944,28 +944,28 @@ ENTRY(flush_icache_page_asm) 
	depwi,z		1, 31-PAGE_SHIFT,1, %r25

	depwi,z		1, 31-PAGE_SHIFT,1, %r25

#endif

#endif

	add		%r28, %r25, %r25

	add		%r28, %r25, %r25

	sub		%r25, %r1, %r25

	sub		%r25, %r31, %r25









	/* fic only has the type 26 form on PA1.1, requiring an

	/* fic only has the type 26 form on PA1.1, requiring an

	 * explicit space specification, so use %sr4 */

	 * explicit space specification, so use %sr4 */

1:      fic,m		%r1(%sr4,%r28)

1:      fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)

	cmpb,COND(<<)	%r28, %r25,1b

	cmpb,COND(<<)	%r28, %r25,1b

	fic,m		%r1(%sr4,%r28)

	fic,m		%r31(%sr4,%r28)





	sync

	sync