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Commit d64567f6 authored by Mark Rutland's avatar Mark Rutland Committed by Will Deacon
Browse files

arm64: use PSR_AA32 definitions 



Some code cares about the SPSR_ELx format for exceptions taken from
AArch32 to inspect or manipulate the SPSR_ELx value, which is already in
the SPSR_ELx format, and not in the AArch32 PSR format.

To separate these from cases where we care about the AArch32 PSR format,
migrate these cases to use the PSR_AA32_* definitions rather than
COMPAT_PSR_*.

There should be no functional change as a result of this patch.

Signed-off-by: default avatarMark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent 76fc52bd

arch/arm64/include/asm/processor.h

+3 −3
Original line number Diff line number Diff line
@@ -182,12 +182,12 @@ static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc, 
				       unsigned long sp)

{

	start_thread_common(regs, pc);

	regs->pstate = COMPAT_PSR_MODE_USR;

	regs->pstate = PSR_AA32_MODE_USR;

	if (pc & 1)

		regs->pstate |= COMPAT_PSR_T_BIT;

		regs->pstate |= PSR_AA32_T_BIT;



#ifdef __AARCH64EB__

	regs->pstate |= COMPAT_PSR_E_BIT;

	regs->pstate |= PSR_AA32_E_BIT;

#endif



	regs->compat_sp = sp;

arch/arm64/include/asm/ptrace.h

+1 −1
Original line number Diff line number Diff line
@@ -211,7 +211,7 @@ static inline void forget_syscall(struct pt_regs *regs) 


#ifdef CONFIG_COMPAT

#define compat_thumb_mode(regs) \

	(((regs)->pstate & COMPAT_PSR_T_BIT))

	(((regs)->pstate & PSR_AA32_T_BIT))

#else

#define compat_thumb_mode(regs) (0)

#endif

arch/arm64/kernel/armv8_deprecated.c

+12 −12
Original line number Diff line number Diff line
@@ -441,8 +441,8 @@ static struct undef_hook swp_hooks[] = { 
	{

		.instr_mask	= 0x0fb00ff0,

		.instr_val	= 0x01000090,

		.pstate_mask	= COMPAT_PSR_MODE_MASK,

		.pstate_val	= COMPAT_PSR_MODE_USR,

		.pstate_mask	= PSR_AA32_MODE_MASK,

		.pstate_val	= PSR_AA32_MODE_USR,

		.fn		= swp_handler

	},

	{ }
@@ -521,15 +521,15 @@ static struct undef_hook cp15_barrier_hooks[] = { 
	{

		.instr_mask	= 0x0fff0fdf,

		.instr_val	= 0x0e070f9a,

		.pstate_mask	= COMPAT_PSR_MODE_MASK,

		.pstate_val	= COMPAT_PSR_MODE_USR,

		.pstate_mask	= PSR_AA32_MODE_MASK,

		.pstate_val	= PSR_AA32_MODE_USR,

		.fn		= cp15barrier_handler,

	},

	{

		.instr_mask	= 0x0fff0fff,

		.instr_val	= 0x0e070f95,

		.pstate_mask	= COMPAT_PSR_MODE_MASK,

		.pstate_val	= COMPAT_PSR_MODE_USR,

		.pstate_mask	= PSR_AA32_MODE_MASK,

		.pstate_val	= PSR_AA32_MODE_USR,

		.fn		= cp15barrier_handler,

	},

	{ }
@@ -562,10 +562,10 @@ static int compat_setend_handler(struct pt_regs *regs, u32 big_endian) 


	if (big_endian) {

		insn = "setend be";

		regs->pstate |= COMPAT_PSR_E_BIT;

		regs->pstate |= PSR_AA32_E_BIT;

	} else {

		insn = "setend le";

		regs->pstate &= ~COMPAT_PSR_E_BIT;

		regs->pstate &= ~PSR_AA32_E_BIT;

	}



	trace_instruction_emulation(insn, regs->pc);
@@ -593,16 +593,16 @@ static struct undef_hook setend_hooks[] = { 
	{

		.instr_mask	= 0xfffffdff,

		.instr_val	= 0xf1010000,

		.pstate_mask	= COMPAT_PSR_MODE_MASK,

		.pstate_val	= COMPAT_PSR_MODE_USR,

		.pstate_mask	= PSR_AA32_MODE_MASK,

		.pstate_val	= PSR_AA32_MODE_USR,

		.fn		= a32_setend_handler,

	},

	{

		/* Thumb mode */

		.instr_mask	= 0x0000fff7,

		.instr_val	= 0x0000b650,

		.pstate_mask	= (COMPAT_PSR_T_BIT | COMPAT_PSR_MODE_MASK),

		.pstate_val	= (COMPAT_PSR_T_BIT | COMPAT_PSR_MODE_USR),

		.pstate_mask	= (PSR_AA32_T_BIT | PSR_AA32_MODE_MASK),

		.pstate_val	= (PSR_AA32_T_BIT | PSR_AA32_MODE_USR),

		.fn		= t16_setend_handler,

	},

	{}

arch/arm64/kernel/cpufeature.c

+1 −1
Original line number Diff line number Diff line
@@ -1723,7 +1723,7 @@ static int emulate_mrs(struct pt_regs *regs, u32 insn) 
static struct undef_hook mrs_hook = {

	.instr_mask = 0xfff00000,

	.instr_val  = 0xd5300000,

	.pstate_mask = COMPAT_PSR_MODE_MASK,

	.pstate_mask = PSR_AA32_MODE_MASK,

	.pstate_val = PSR_MODE_EL0t,

	.fn = emulate_mrs,

};

arch/arm64/kernel/process.c

+10 −10
Original line number Diff line number Diff line
@@ -177,16 +177,16 @@ static void print_pstate(struct pt_regs *regs) 
	if (compat_user_mode(regs)) {

		printk("pstate: %08llx (%c%c%c%c %c %s %s %c%c%c)\n",

			pstate,

			pstate & COMPAT_PSR_N_BIT ? 'N' : 'n',

			pstate & COMPAT_PSR_Z_BIT ? 'Z' : 'z',

			pstate & COMPAT_PSR_C_BIT ? 'C' : 'c',

			pstate & COMPAT_PSR_V_BIT ? 'V' : 'v',

			pstate & COMPAT_PSR_Q_BIT ? 'Q' : 'q',

			pstate & COMPAT_PSR_T_BIT ? "T32" : "A32",

			pstate & COMPAT_PSR_E_BIT ? "BE" : "LE",

			pstate & COMPAT_PSR_A_BIT ? 'A' : 'a',

			pstate & COMPAT_PSR_I_BIT ? 'I' : 'i',

			pstate & COMPAT_PSR_F_BIT ? 'F' : 'f');

			pstate & PSR_AA32_N_BIT ? 'N' : 'n',

			pstate & PSR_AA32_Z_BIT ? 'Z' : 'z',

			pstate & PSR_AA32_C_BIT ? 'C' : 'c',

			pstate & PSR_AA32_V_BIT ? 'V' : 'v',

			pstate & PSR_AA32_Q_BIT ? 'Q' : 'q',

			pstate & PSR_AA32_T_BIT ? "T32" : "A32",

			pstate & PSR_AA32_E_BIT ? "BE" : "LE",

			pstate & PSR_AA32_A_BIT ? 'A' : 'a',

			pstate & PSR_AA32_I_BIT ? 'I' : 'i',

			pstate & PSR_AA32_F_BIT ? 'F' : 'f');

	} else {

		printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO)\n",

			pstate,