Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d635db55 authored by Pengbo Mu's avatar Pengbo Mu Committed by Felipe Balbi
Browse files

usb: dwc3: add global soc bus configuration reg0



Add the macro definition for global soc bus configuration
register 0

Signed-off-by: default avatarChangming Huang <jerry.huang@nxp.com>
Signed-off-by: default avatarRan Wang <ran.wang_1@nxp.com>
Signed-off-by: default avatarPengbo Mu <pengbo.mu@nxp.com>
Signed-off-by: default avatarFelipe Balbi <felipe.balbi@linux.intel.com>
parent 87d852de
Loading
Loading
Loading
Loading
+11 −0
Original line number Diff line number Diff line
@@ -163,6 +163,17 @@

/* Bit fields */

/* Global SoC Bus Configuration INCRx Register 0 */
#define DWC3_GSBUSCFG0_INCR256BRSTENA	(1 << 7) /* INCR256 burst */
#define DWC3_GSBUSCFG0_INCR128BRSTENA	(1 << 6) /* INCR128 burst */
#define DWC3_GSBUSCFG0_INCR64BRSTENA	(1 << 5) /* INCR64 burst */
#define DWC3_GSBUSCFG0_INCR32BRSTENA	(1 << 4) /* INCR32 burst */
#define DWC3_GSBUSCFG0_INCR16BRSTENA	(1 << 3) /* INCR16 burst */
#define DWC3_GSBUSCFG0_INCR8BRSTENA	(1 << 2) /* INCR8 burst */
#define DWC3_GSBUSCFG0_INCR4BRSTENA	(1 << 1) /* INCR4 burst */
#define DWC3_GSBUSCFG0_INCRBRSTENA	(1 << 0) /* undefined length enable */
#define DWC3_GSBUSCFG0_INCRBRST_MASK	0xff

/* Global Debug Queue/FIFO Space Available Register */
#define DWC3_GDBGFIFOSPACE_NUM(n)	((n) & 0x1f)
#define DWC3_GDBGFIFOSPACE_TYPE(n)	(((n) << 5) & 0x1e0)