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Commit d5dc36a4 authored by Alex Deucher's avatar Alex Deucher
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drm/amdgpu/gfx8: enable cp/rlc ints after we disable clockgating



Even if we disable clockgating, we still need to make sure the
cp/rlc interrupts are enabled for powergating which might still
be enabled.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent dfa6c82e
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+2 −0
Original line number Diff line number Diff line
@@ -6107,6 +6107,8 @@ static void gfx_v8_0_update_coarse_grain_clock_gating(struct amdgpu_device *adev
			  RLC_CGCG_CGLS_CTRL__CGLS_EN_MASK);
		if (temp != data)
			WREG32(mmRLC_CGCG_CGLS_CTRL, data);
		/* enable interrupts again for PG */
		gfx_v8_0_enable_gui_idle_interrupt(adev, true);
	}

	gfx_v8_0_wait_for_rlc_serdes(adev);