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Commit d586b5f4 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Index the ring frequency table by HW frequency range 



When reporting the frequency table stored in the punit, report the full
range and not just the user restricted frequency range. In the process
keep the code to set the frequency table and read it the same.

v3: As we haven't separated the sb_lock from the pcu_lock yet, there's a
cycle between the pcu_lock and intel_runtime_pm_get.

References: f936ec34 ("drm/i915/skl: Updated the i915_ring_freq_table debugfs function")
Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20180308142648.4016-2-chris@chris-wilson.co.uk
parent 59cd31f1

drivers/gpu/drm/i915/i915_debugfs.c

+6 −7
Original line number Diff line number Diff line
@@ -1796,9 +1796,9 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) 
{

	struct drm_i915_private *dev_priv = node_to_i915(m->private);

	struct intel_rps *rps = &dev_priv->gt_pm.rps;

	int ret = 0;

	int gpu_freq, ia_freq;

	unsigned int max_gpu_freq, min_gpu_freq;

	int gpu_freq, ia_freq;

	int ret;



	if (!HAS_LLC(dev_priv))

		return -ENODEV;
@@ -1809,13 +1809,12 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused) 
	if (ret)

		goto out;



	min_gpu_freq = rps->min_freq;

	max_gpu_freq = rps->max_freq;

	if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {

		/* Convert GT frequency to 50 HZ units */

		min_gpu_freq = rps->min_freq_softlimit / GEN9_FREQ_SCALER;

		max_gpu_freq = rps->max_freq_softlimit / GEN9_FREQ_SCALER;

	} else {

		min_gpu_freq = rps->min_freq_softlimit;

		max_gpu_freq = rps->max_freq_softlimit;

		min_gpu_freq /= GEN9_FREQ_SCALER;

		max_gpu_freq /= GEN9_FREQ_SCALER;

	}



	seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");

drivers/gpu/drm/i915/intel_pm.c

+4 −5
Original line number Diff line number Diff line
@@ -6918,13 +6918,12 @@ static void gen6_update_ring_freq(struct drm_i915_private *dev_priv) 
	/* convert DDR frequency from units of 266.6MHz to bandwidth */

	min_ring_freq = mult_frac(min_ring_freq, 8, 3);



	if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {

		/* Convert GT frequency to 50 HZ units */

		min_gpu_freq = rps->min_freq / GEN9_FREQ_SCALER;

		max_gpu_freq = rps->max_freq / GEN9_FREQ_SCALER;

	} else {

	min_gpu_freq = rps->min_freq;

	max_gpu_freq = rps->max_freq;

	if (IS_GEN9_BC(dev_priv) || IS_CANNONLAKE(dev_priv)) {

		/* Convert GT frequency to 50 HZ units */

		min_gpu_freq /= GEN9_FREQ_SCALER;

		max_gpu_freq /= GEN9_FREQ_SCALER;

	}



	/*