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Commit d4b25f9f authored by Vatsal Bucha's avatar Vatsal Bucha
Browse files

soc: swr-mstr: Fix random headset detection issue on scuba 



When headset is inserted and reboot device sometimes
headset is not detected after reboot as host_irq from
swr slave gets masked. This is because of cmd error seen
after clearing all irq which results in fifo flush.
Read swrslave irq before clearing so as to resolve cmd error.
Also enable host irq after clearing enum interrupt at master.
This ensures irq is properly enabled.

Change-Id: Id66029c65c4d813391bfeb8c0c619560f298eeab
Signed-off-by: default avatarVatsal Bucha <vbucha@codeaurora.org>
parent 1b6c2283

soc/swr-mstr-ctrl.c

+11 −9
Original line number Diff line number Diff line
@@ -1819,6 +1819,7 @@ static void swrm_enable_slave_irq(struct swr_mstr_ctrl *swrm) 
{

	int i;

	int status = 0;

	u32 temp;



	status = swr_master_read(swrm, SWRM_MCP_SLV_STATUS);

	if (!status) {
@@ -1829,6 +1830,8 @@ static void swrm_enable_slave_irq(struct swr_mstr_ctrl *swrm) 
	dev_dbg(swrm->dev, "%s: slave status: 0x%x\n", __func__, status);

	for (i = 0; i < (swrm->master.num_dev + 1); i++) {

		if (status & SWRM_MCP_SLV_STATUS_MASK) {

			swrm_cmd_fifo_rd_cmd(swrm, &temp, i, 0x0,

					SWRS_SCP_INT_STATUS_CLEAR_1, 1);

			swrm_cmd_fifo_wr_cmd(swrm, 0xFF, i, 0x0,

					SWRS_SCP_INT_STATUS_CLEAR_1);

			swrm_cmd_fifo_wr_cmd(swrm, 0x4, i, 0x0,
@@ -1967,10 +1970,7 @@ static irqreturn_t swr_mstr_interrupt(int irq, void *dev) 
					 * as hw will mask host_irq at slave

					 * but will not unmask it afterwards.

					 */

					swrm_cmd_fifo_wr_cmd(swrm, 0xFF, devnum, 0x0,

						SWRS_SCP_INT_STATUS_CLEAR_1);

					swrm_cmd_fifo_wr_cmd(swrm, 0x4, devnum, 0x0,

						SWRS_SCP_INT_STATUS_MASK_1);

					swrm->enable_slave_irq = true;

				}

				break;

			case SWR_ATTACHED_OK:
@@ -1978,11 +1978,7 @@ static irqreturn_t swr_mstr_interrupt(int irq, void *dev) 
					"%s: device %d got attached\n",

					__func__, devnum);

				/* enable host irq from slave device*/

				swrm_cmd_fifo_wr_cmd(swrm, 0xFF, devnum, 0x0,

					SWRS_SCP_INT_STATUS_CLEAR_1);

				swrm_cmd_fifo_wr_cmd(swrm, 0x4, devnum, 0x0,

					SWRS_SCP_INT_STATUS_MASK_1);



				swrm->enable_slave_irq = true;

				break;

			case SWR_ALERT:

				dev_dbg(swrm->dev,
@@ -2096,6 +2092,12 @@ static irqreturn_t swr_mstr_interrupt(int irq, void *dev) 
	swr_master_write(swrm, SWRM_INTERRUPT_CLEAR, intr_sts);

	swr_master_write(swrm, SWRM_INTERRUPT_CLEAR, 0x0);



	if (swrm->enable_slave_irq) {

		/* Enable slave irq here */

		swrm_enable_slave_irq(swrm);

		swrm->enable_slave_irq = false;

	}



	intr_sts = swr_master_read(swrm, SWRM_INTERRUPT_STATUS);

	intr_sts_masked = intr_sts & swrm->intr_mask;

soc/swr-mstr-ctrl.h

+1 −0
Original line number Diff line number Diff line
@@ -192,6 +192,7 @@ struct swr_mstr_ctrl { 
	u32 disable_div2_clk_switch;

	u32 rd_fifo_depth;

	u32 wr_fifo_depth;

	bool enable_slave_irq;

#ifdef CONFIG_DEBUG_FS

	struct dentry *debugfs_swrm_dent;

	struct dentry *debugfs_peek;