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Commit d4905b38 authored by Nicolas Royer's avatar Nicolas Royer Committed by Herbert Xu
Browse files

crypto: atmel-sha - add support for latest release of the IP (0x410) 



Updates from IP release 0x320 to 0x400:
 - add DMA support (previous IP revision use PDC)
 - add DMA double input buffer support
 - add SHA224 support

Update from IP release 0x400 to 0x410:
 - add SHA384 and SHA512 support

Signed-off-by: default avatarNicolas Royer <nicolas@eukrea.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: default avatarEric Bénard <eric@eukrea.com>
Tested-by: default avatarEric Bénard <eric@eukrea.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 1f858040

drivers/crypto/Kconfig

+5 −3
Original line number Diff line number Diff line
@@ -361,15 +361,17 @@ config CRYPTO_DEV_ATMEL_TDES 
	  will be called atmel-tdes.



config CRYPTO_DEV_ATMEL_SHA

	tristate "Support for Atmel SHA1/SHA256 hw accelerator"

	tristate "Support for Atmel SHA hw accelerator"

	depends on ARCH_AT91

	select CRYPTO_SHA1

	select CRYPTO_SHA256

	select CRYPTO_SHA512

	select CRYPTO_ALGAPI

	help

	  Some Atmel processors have SHA1/SHA256 hw accelerator.

	  Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512

	  hw accelerator.

	  Select this if you want to use the Atmel module for

	  SHA1/SHA256 algorithms.

	  SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.



	  To compile this driver as a module, choose M here: the module

	  will be called atmel-sha.

drivers/crypto/atmel-sha-regs.h

+6 −1
Original line number Diff line number Diff line
@@ -14,10 +14,13 @@ 
#define SHA_MR_MODE_MANUAL		0x0

#define SHA_MR_MODE_AUTO		0x1

#define SHA_MR_MODE_PDC			0x2

#define	SHA_MR_DUALBUFF			(1 << 3)

#define SHA_MR_PROCDLY			(1 << 4)

#define SHA_MR_ALGO_SHA1		(0 << 8)

#define SHA_MR_ALGO_SHA256		(1 << 8)

#define SHA_MR_ALGO_SHA384		(2 << 8)

#define SHA_MR_ALGO_SHA512		(3 << 8)

#define SHA_MR_ALGO_SHA224		(4 << 8)

#define	SHA_MR_DUALBUFF			(1 << 16)



#define SHA_IER				0x10

#define SHA_IDR				0x14
@@ -33,6 +36,8 @@ 
#define SHA_ISR_URAT_MR			(0x2 << 12)

#define SHA_ISR_URAT_WO			(0x5 << 12)



#define	SHA_HW_VERSION		0xFC



#define SHA_TPR				0x108

#define SHA_TCR				0x10C

#define SHA_TNPR			0x118

drivers/crypto/atmel-sha.c

+486 −100

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