Loading qcom/sa8155.dtsi +0 −10 Original line number Original line Diff line number Diff line Loading @@ -78,15 +78,6 @@ <&tlmm 124 2>; <&tlmm 124 2>; interrupt-names = "macirq", "eth_lpi", interrupt-names = "macirq", "eth_lpi", "phy-intr"; "phy-intr"; qcom,msm-bus,name = "emac"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <98 512 0 0>, <1 781 0 0>, /* No vote */ <98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */ <98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */ <98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */ qcom,bus-vector-names = "0", "10", "100", "1000"; snps,tso; snps,tso; rx-fifo-depth = <4096>; rx-fifo-depth = <4096>; tx-fifo-depth = <4096>; tx-fifo-depth = <4096>; Loading Loading @@ -139,7 +130,6 @@ ethqos_emb_smmu: ethqos_emb_smmu { ethqos_emb_smmu: ethqos_emb_smmu { compatible = "qcom,emac-smmu-embedded"; compatible = "qcom,emac-smmu-embedded"; iommus = <&apps_smmu 0x3C0 0x0>; iommus = <&apps_smmu 0x3C0 0x0>; qcom,iommu-dma = "atomic"; qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>; qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>; }; }; }; }; Loading Loading
qcom/sa8155.dtsi +0 −10 Original line number Original line Diff line number Diff line Loading @@ -78,15 +78,6 @@ <&tlmm 124 2>; <&tlmm 124 2>; interrupt-names = "macirq", "eth_lpi", interrupt-names = "macirq", "eth_lpi", "phy-intr"; "phy-intr"; qcom,msm-bus,name = "emac"; qcom,msm-bus,num-cases = <4>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <98 512 0 0>, <1 781 0 0>, /* No vote */ <98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */ <98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */ <98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */ qcom,bus-vector-names = "0", "10", "100", "1000"; snps,tso; snps,tso; rx-fifo-depth = <4096>; rx-fifo-depth = <4096>; tx-fifo-depth = <4096>; tx-fifo-depth = <4096>; Loading Loading @@ -139,7 +130,6 @@ ethqos_emb_smmu: ethqos_emb_smmu { ethqos_emb_smmu: ethqos_emb_smmu { compatible = "qcom,emac-smmu-embedded"; compatible = "qcom,emac-smmu-embedded"; iommus = <&apps_smmu 0x3C0 0x0>; iommus = <&apps_smmu 0x3C0 0x0>; qcom,iommu-dma = "atomic"; qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>; qcom,iommu-dma-addr-pool = <0x80000000 0x40000000>; }; }; }; }; Loading