No barrier needed on au1x.

int (*board_pci_idsel)(unsigned int devsel, int assert);

/* CP0 hazard avoidance. */

#define BARRIER __asm__ __volatile__(".set noreorder\n\t" \

				     "nop; nop; nop; nop;\t" \

				     ".set reorder\n\t")

void mod_wired_entry(int entry, unsigned long entrylo0,

		unsigned long entrylo1, unsigned long entryhi,

		unsigned long pagemask)

	old_ctx = read_c0_entryhi() & 0xff;

	old_pagemask = read_c0_pagemask();

	write_c0_index(entry);

	BARRIER;

	write_c0_pagemask(pagemask);

	write_c0_entryhi(entryhi);

	write_c0_entrylo0(entrylo0);

	write_c0_entrylo1(entrylo1);

	BARRIER;

	tlb_write_indexed();

	BARRIER;

	write_c0_entryhi(old_ctx);

	BARRIER;

	write_c0_pagemask(old_pagemask);

}