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Commit d4168be7 authored by Alexandre TORGUE's avatar Alexandre TORGUE Committed by Linus Walleij
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pinctrl: Amend bindings for STM32 pinctrl 



Adds "ngpios" and "gpio-ranges" bindings definition.

Signed-off-by: default avatarAlexandre TORGUE <alexandre.torgue@st.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 117bd6e8

Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt

+53 −1
Original line number Diff line number Diff line
@@ -38,8 +38,23 @@ Optional properties: 
 - st,syscfg: Should be phandle/offset pair. The phandle to the syscon node

   which includes IRQ mux selection register, and the offset of the IRQ mux

   selection register.

 - ngpios: Number of gpios in a bank (to use if bank gpio numbers is less

   than 16).

 - gpio-ranges: Define a dedicated mapping between a pin-controller and

   a gpio controller. Format is <&phandle a b c> with:

	-(phandle): phandle of pin-controller.

	-(a): gpio base offset in range.

	-(b): pin base offset in range.

	-(c): gpio count in range

   This entry has to be used either if there are holes inside a bank:

	GPIOB0/B1/B2/B14/B15 (see example 2)

   or if banks are not contiguous:

	GPIOA/B/C/E...

   NOTE: If "gpio-ranges" is used for a gpio controller, all gpio-controller

   have to use a "gpio-ranges" entry.

   More details in Documentation/devicetree/bindings/gpio/gpio.txt.



Example:

Example 1:

#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>

...
@@ -61,6 +76,43 @@ Example: 
		pin-functions nodes follow...

	};



Example 2:

#include <dt-bindings/pinctrl/stm32f429-pinfunc.h>

...



	pinctrl: pin-controller {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "st,stm32f429-pinctrl";

		ranges = <0 0x40020000 0x3000>;

		pins-are-numbered;



		gpioa: gpio@40020000 {

			gpio-controller;

			#gpio-cells = <2>;

			reg = <0x0 0x400>;

			resets = <&reset_ahb1 0>;

			st,bank-name = "GPIOA";

			gpio-ranges = <&pinctrl 0 0 16>;

		};



		gpiob: gpio@40020400 {

			gpio-controller;

			#gpio-cells = <2>;

			reg = <0x0 0x400>;

			resets = <&reset_ahb1 0>;

			st,bank-name = "GPIOB";

			ngpios = 4;

			gpio-ranges = <&pinctrl 0 16 3>,

				      <&pinctrl 14 30 2>;

		};





		...

		pin-functions nodes follow...

	};





Contents of function subnode node:

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Subnode format