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Commit d40f2fd7 authored by Asutosh Das's avatar Asutosh Das
Browse files

ARM: dts: msm: Update ufs bus vote for Lahaina 

Update the bus vote of gear-3 and gear-4 to actual
needed bandwidth.

Change-Id: Ideda07a0fead0fc9413356b77d380648fd690329
parent 12f20880

qcom/lahaina.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -1590,16 +1590,16 @@ 
		<14752 0>, <1000 0>,   /* PWM G4 L2 */

		<127796 0>, <1000 0>,  /* HS G1 RA */

		<255591 0>, <1000 0>,  /* HS G2 RA */

		<2097152 0>, <102400 0>,  /* HS G3 RA */

		<4194304 0>, <204800 0>,  /* HS G4 RA */

		<1492582 0>, <102400 0>,  /* HS G3 RA */

		<2915200 0>, <204800 0>,  /* HS G4 RA */

		<255591 0>, <1000 0>,  /* HS G1 RA L2 */

		<511181 0>, <1000 0>,  /* HS G2 RA L2 */

		<4194304 0>, <204800 0>, /* HS G3 RA L2 */

		<8388608 0>, <409600 0>, /* HS G4 RA L2 */

		<1492582 0>, <204800 0>, /* HS G3 RA L2 */

		<2915200 0>, <409600 0>, /* HS G4 RA L2 */

		<149422 0>, <1000 0>,  /* HS G1 RB */

		<298189 0>, <1000 0>,  /* HS G2 RB */

		<2097152 0>, <102400 0>,  /* HS G3 RB */

		<4194304 0>, <204800 0>,  /* HS G4 RB */

		<1492582 0>, <102400 0>,  /* HS G3 RB */

		<2915200 0>, <204800 0>,  /* HS G4 RB */

		<298189 0>, <1000 0>,  /* HS G1 RB L2 */

		<596378 0>, <1000 0>,  /* HS G2 RB L2 */

		/* As UFS working in HS G3 RB L2 mode, aggregated
@@ -1608,8 +1608,8 @@ 
		 * in order to scale up CNOC clock, instantaneous

		 * bindwidth (IB) needs to be given a proper value too.

		 */

		<4194304 0>, <204800 409600>, /* HS G3 RB L2 */

		<8388608 0>, <409600 409600>, /* HS G4 RB L2 */

		<1492582 0>, <204800 409600>, /* HS G3 RB L2 KBPs */

		<2915200 0>, <409600 409600>, /* HS G4 RB L2 */

		<7643136 0>, <307200 0>; /* Max. bandwidth */



		qcom,bus-vector-names = "MIN",