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Commit d3028e1e authored by Sarthak Garg's avatar Sarthak Garg
Browse files

mmc: cqhci: Port two trivial fixes in cqhci from earlier kernels 



This is a squash of below two minor fixes:

8fec754f57a8 mmc: cmdq: trigger get queue status after dcmd
327fd3225911 mmc: cqhci: CQ Register changes for v5.0 onwards.

Change-Id: I1bb6cae5a647c4ea189a992d5ace7b6c1e3a1c87
Signed-off-by: default avatarSarthak Garg <sartgarg@codeaurora.org>
parent 5b478488

drivers/mmc/host/cqhci.c

+15 −0
Original line number Diff line number Diff line
@@ -102,6 +102,10 @@ static void cqhci_set_irqs(struct cqhci_host *cq_host, u32 set) 
static void cqhci_dumpregs(struct cqhci_host *cq_host)

{

	struct mmc_host *mmc = cq_host->mmc;

	int offset = 0;



	if (cq_host->offset_changed)

		offset = CQE_V5_VENDOR_CFG;



	CQHCI_DUMP("============ CQHCI REGISTER DUMP ===========\n");
@@ -138,6 +142,8 @@ static void cqhci_dumpregs(struct cqhci_host *cq_host) 
	CQHCI_DUMP("Resp idx:  0x%08x | Resp arg: 0x%08x\n",

		   cqhci_readl(cq_host, CQHCI_CRI),

		   cqhci_readl(cq_host, CQHCI_CRA));

	CQHCI_DUMP("Vendor cfg 0x%08x\n",

		   cqhci_readl(cq_host, CQHCI_VENDOR_CFG + offset));



	cqhci_crypto_debug(cq_host);
@@ -793,6 +799,10 @@ static void cqhci_finish_mrq(struct mmc_host *mmc, unsigned int tag) 
	struct cqhci_slot *slot = &cq_host->slot[tag];

	struct mmc_request *mrq = slot->mrq;

	struct mmc_data *data;

	int offset = 0;



	if (cq_host->offset_changed)

		offset = CQE_V5_VENDOR_CFG;



	if (!mrq) {

		WARN_ONCE(1, "%s: cqhci: spurious TCN for tag %d\n",
@@ -818,6 +828,11 @@ static void cqhci_finish_mrq(struct mmc_host *mmc, unsigned int tag) 
			data->bytes_xfered = 0;

		else

			data->bytes_xfered = data->blksz * data->blocks;

	} else {

		cqhci_writel(cq_host, cqhci_readl(cq_host,

				CQHCI_VENDOR_CFG + offset) |

				CMDQ_SEND_STATUS_TRIGGER,

				CQHCI_VENDOR_CFG + offset);

	}



	mmc_cqe_request_done(mmc, mrq);

drivers/mmc/host/cqhci.h

+2 −0
Original line number Diff line number Diff line
@@ -118,6 +118,8 @@ 
 * register address for SDHC v5.0 onwards.

 */

#define CQE_V5_VENDOR_CFG		0x900

#define CQHCI_VENDOR_CFG   0x100

#define CMDQ_SEND_STATUS_TRIGGER (1 << 31)



#define CQHCI_INT_ALL			0xF

#define CQHCI_IC_DEFAULT_ICCTH		31