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Unverified Commit d2f96554 authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Paul Burton
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MIPS: Treat Loongson Extensions as ASEs



Recently, binutils had split Loongson-3 Extensions into four ASEs:
MMI, CAM, EXT, EXT2. This patch do the samething in kernel and expose
them in cpuinfo so applications can probe supported ASEs at runtime.

Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Yunqiang Su <ysu@wavecomp.com>
Cc: stable@vger.kernel.org # v4.14+
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
parent 322e577b
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+16 −0
Original line number Diff line number Diff line
@@ -397,6 +397,22 @@
#define cpu_has_dsp3		__ase(MIPS_ASE_DSP3)
#endif

#ifndef cpu_has_loongson_mmi
#define cpu_has_loongson_mmi		__ase(MIPS_ASE_LOONGSON_MMI)
#endif

#ifndef cpu_has_loongson_cam
#define cpu_has_loongson_cam		__ase(MIPS_ASE_LOONGSON_CAM)
#endif

#ifndef cpu_has_loongson_ext
#define cpu_has_loongson_ext		__ase(MIPS_ASE_LOONGSON_EXT)
#endif

#ifndef cpu_has_loongson_ext2
#define cpu_has_loongson_ext2		__ase(MIPS_ASE_LOONGSON_EXT2)
#endif

#ifndef cpu_has_mipsmt
#define cpu_has_mipsmt		__isa_lt_and_ase(6, MIPS_ASE_MIPSMT)
#endif
+4 −0
Original line number Diff line number Diff line
@@ -428,5 +428,9 @@ enum cpu_type_enum {
#define MIPS_ASE_MSA		0x00000100 /* MIPS SIMD Architecture */
#define MIPS_ASE_DSP3		0x00000200 /* Signal Processing ASE Rev 3*/
#define MIPS_ASE_MIPS16E2	0x00000400 /* MIPS16e2 */
#define MIPS_ASE_LOONGSON_MMI	0x00000800 /* Loongson MultiMedia extensions Instructions */
#define MIPS_ASE_LOONGSON_CAM	0x00001000 /* Loongson CAM */
#define MIPS_ASE_LOONGSON_EXT	0x00002000 /* Loongson EXTensions */
#define MIPS_ASE_LOONGSON_EXT2	0x00004000 /* Loongson EXTensions R2 */

#endif /* _ASM_CPU_H */
+6 −0
Original line number Diff line number Diff line
@@ -1547,6 +1547,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
			__cpu_name[cpu] = "ICT Loongson-3";
			set_elf_platform(cpu, "loongson3a");
			set_isa(c, MIPS_CPU_ISA_M64R1);
			c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
				MIPS_ASE_LOONGSON_EXT);
			break;
		case PRID_REV_LOONGSON3B_R1:
		case PRID_REV_LOONGSON3B_R2:
@@ -1554,6 +1556,8 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
			__cpu_name[cpu] = "ICT Loongson-3";
			set_elf_platform(cpu, "loongson3b");
			set_isa(c, MIPS_CPU_ISA_M64R1);
			c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
				MIPS_ASE_LOONGSON_EXT);
			break;
		}

@@ -1920,6 +1924,8 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu)
		decode_configs(c);
		c->options |= MIPS_CPU_FTLB | MIPS_CPU_TLBINV | MIPS_CPU_LDPTE;
		c->writecombine = _CACHE_UNCACHED_ACCELERATED;
		c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
			MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
		break;
	default:
		panic("Unknown Loongson Processor ID!");
+4 −0
Original line number Diff line number Diff line
@@ -124,6 +124,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
	if (cpu_has_eva)	seq_printf(m, "%s", " eva");
	if (cpu_has_htw)	seq_printf(m, "%s", " htw");
	if (cpu_has_xpa)	seq_printf(m, "%s", " xpa");
	if (cpu_has_loongson_mmi)	seq_printf(m, "%s", " loongson-mmi");
	if (cpu_has_loongson_cam)	seq_printf(m, "%s", " loongson-cam");
	if (cpu_has_loongson_ext)	seq_printf(m, "%s", " loongson-ext");
	if (cpu_has_loongson_ext2)	seq_printf(m, "%s", " loongson-ext2");
	seq_printf(m, "\n");

	if (cpu_has_mmips) {