Merge "msm: camera: cpas: Support OT enablement through Fuse" into camera-kernel.lnx.4.0 (d2c38601) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/cam_cpas/cam_cpas_hw.c

+5 −1

Original line number	Diff line number	Diff line
		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
		* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
		*/

		#include <linux/device.h>
		@@ -112,6 +112,10 @@ int cam_cpas_util_reg_update(struct cam_hw_info *cpas_hw,
		if (reg_info->enable == false)
		return 0;

		if (reg_info->is_fuse_based &&
		!cam_cpas_is_feature_supported(CAM_CPAS_RT_OT_FUSE, 0xFF, 0))
		return 0;

		reg_base_index = cpas_core->regbase_index[reg_base];
		if (reg_base_index == -1)
		return -EINVAL;

drivers/cam_cpas/cam_cpas_hw.h

+3 −1

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
		* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
		*/

		#ifndef _CAM_CPAS_HW_H_
		@@ -94,6 +94,7 @@ struct cam_cpas_internal_ops {
		* struct cam_cpas_reg : CPAS register info
		*
		* @enable: Whether this reg info need to be enabled
		* @is_fuse_based : Whether this reg info need to be enabled based on fuse
		* @access_type: Register access type
		* @masked_value: Whether this register write/read is based on mask, shift
		* @mask: Mask for this register value
		@@ -103,6 +104,7 @@ struct cam_cpas_internal_ops {
		*/
		struct cam_cpas_reg {
		bool enable;
		bool is_fuse_based;
		enum cam_cpas_access_type access_type;
		bool masked_value;
		uint32_t offset;

drivers/cam_cpas/cpas_top/cpastop100.h

+36 −1

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
		* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
		*/

		#ifndef _CPASTOP100_H_
		@@ -204,6 +204,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
		@@ -211,6 +212,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
		@@ -218,6 +220,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
		@@ -227,6 +230,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
		@@ -234,6 +238,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
		@@ -248,6 +253,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
		@@ -255,6 +261,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
		@@ -262,6 +269,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
		@@ -273,18 +281,21 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
		.value = 0xFFFFFF00,
		},
		.safe_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
		.value = 0x3,
		},
		.ubwc_ctl = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x588, /* SPECIFIC_IFE02_ENCCTL_LOW */
		@@ -296,6 +307,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
		@@ -303,6 +315,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
		@@ -310,6 +323,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
		@@ -321,18 +335,21 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
		.value = 0xFFFFFF00,
		},
		.safe_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
		.value = 0x3,
		},
		.ubwc_ctl = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x988, /* SPECIFIC_IFE13_ENCCTL_LOW */
		@@ -344,6 +361,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
		@@ -351,6 +369,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
		@@ -358,6 +377,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
		@@ -369,6 +389,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
		@@ -376,6 +397,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
		@@ -383,6 +405,7 @@ static struct cam_camnoc_specific
		},
		.ubwc_ctl = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
		@@ -394,6 +417,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
		@@ -401,6 +425,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
		@@ -408,6 +433,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
		@@ -419,6 +445,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
		@@ -426,6 +453,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
		@@ -433,6 +461,7 @@ static struct cam_camnoc_specific
		},
		.ubwc_ctl = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
		@@ -444,6 +473,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
		@@ -451,6 +481,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
		@@ -458,6 +489,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
		@@ -465,6 +497,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
		@@ -472,6 +505,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
		@@ -479,6 +513,7 @@ static struct cam_camnoc_specific
		},
		.ubwc_ctl = {
		.enable = false,
		.is_fuse_based = false,
		},
		},
		{

drivers/cam_cpas/cpas_top/cpastop_v150_100.h

+34 −1

Original line number	Diff line number	Diff line
		/* SPDX-License-Identifier: GPL-2.0-only */
		/*
		* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
		* Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
		*/

		#ifndef _CPASTOP_V150_100_H_
		@@ -204,6 +204,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
		@@ -211,6 +212,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
		@@ -218,6 +220,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
		@@ -227,6 +230,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
		@@ -234,6 +238,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
		@@ -248,6 +253,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
		@@ -255,6 +261,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
		@@ -262,6 +269,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
		@@ -273,12 +281,14 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
		.value = 0xFFFFFF00,
		},
		.safe_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
		.value = 0x1,
		@@ -292,6 +302,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
		@@ -299,6 +310,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
		@@ -306,6 +318,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
		@@ -317,12 +330,14 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
		.value = 0xFFFFFF00,
		},
		.safe_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
		.value = 0x1,
		@@ -336,6 +351,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
		@@ -343,6 +359,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
		@@ -350,6 +367,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
		@@ -361,6 +379,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
		@@ -368,6 +387,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
		@@ -375,6 +395,7 @@ static struct cam_camnoc_specific
		},
		.ubwc_ctl = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
		@@ -386,6 +407,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
		@@ -393,6 +415,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
		@@ -400,6 +423,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
		@@ -411,6 +435,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
		@@ -418,6 +443,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
		@@ -425,6 +451,7 @@ static struct cam_camnoc_specific
		},
		.ubwc_ctl = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
		@@ -436,6 +463,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
		@@ -443,6 +471,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
		@@ -450,6 +479,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
		@@ -457,6 +487,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
		@@ -464,6 +495,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
		@@ -482,6 +514,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.flag_out_set0_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_WRITE,
		.masked_value = 0,
		.offset = 0x2088,

drivers/cam_cpas/cpas_top/cpastop_v165_100.h

+48 −0

Original line number	Diff line number	Diff line
		@@ -204,6 +204,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4230, /* CDM_PRIORITYLUT_LOW */
		@@ -211,6 +212,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4234, /* CDM_PRIORITYLUT_HIGH */
		@@ -218,6 +220,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0, /* CDM_Urgency_Low */
		.offset = 0x4238,
		@@ -227,6 +230,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4240, /* CDM_DANGERLUT_LOW */
		@@ -234,6 +238,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4248, /* CDM_SAFELUT_LOW */
		@@ -248,6 +253,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x3630, /* IFE01234_RDI_PRIORITYLUT_LOW */
		@@ -255,6 +261,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x3634, /* IFE01234_RDI_PRIORITYLUT_HIGH */
		@@ -262,6 +269,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x3638, /* IFE01234_RDI_LINEAR_URGENCY_LOW */
		@@ -271,12 +279,14 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x3640, /* IFE01234_RDI_DANGERLUT_LOW */
		.value = 0xFFFFFF00,
		},
		.safe_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x3648, /* IFE01234_RDI_SAFELUT_LOW */
		.value = 0x000F,
		@@ -291,6 +301,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_mainctl = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4808, /* IFE01234_RDI_QOSGEN_MAINCTL */
		@@ -298,6 +309,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_shaping_low = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4820, /* IFE01234_RDI_QOSGEN_SHAPING_LOW */
		@@ -305,6 +317,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_shaping_high = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4824, /* IFE01234_RDI_QOSGEN_SHAPING_HIGH */
		@@ -316,6 +329,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x3A30, /* IFE01_NRDI_PRIORITYLUT_LOW */
		@@ -323,6 +337,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x3A34, /* IFE01_NRDI_PRIORITYLUT_HIGH */
		@@ -330,6 +345,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x3A38, /* IFE01_NRDI_URGENCY_LOW */
		@@ -341,12 +357,14 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x3A40, /* IFE01_NRDI_DANGERLUT_LOW */
		.value = 0xFFFFFF00,
		},
		.safe_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x3A48, /* IFE01_NRDI_SAFELUT_LOW */
		.value = 0xF,
		@@ -366,6 +384,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_mainctl = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4708, /* IFE01_NRDI_QOSGEN_MAINCTL */
		@@ -373,6 +392,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_shaping_low = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4720, /* IFE01_NRDI_QOSGEN_SHAPING_LOW */
		@@ -380,6 +400,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_shaping_high = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x4724, /* IFE01_NRDI_QOSGEN_SHAPING_HIGH */
		@@ -391,6 +412,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x5430, /* IFE2_NDRI_PRIORITYLUT_LOW */
		@@ -398,6 +420,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		/* IFE2_NRDI_PRIORITYLUT_HIGH */
		@@ -406,6 +429,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x5438, /* IFE2_NRDI_URGENCY_LOW */
		@@ -417,12 +441,14 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x5440, /* IFE2_NRDI_DANGERLUT_LOW */
		.value = 0xFFFFFF00,
		},
		.safe_lut = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.offset = 0x5448, /* IFE2_NRDI_SAFELUT_LOW */
		.value = 0xF,
		@@ -441,6 +467,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_mainctl = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x5188, /* IFE2_NRDI_QOSGEN_MAINCTL */
		@@ -448,6 +475,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_shaping_low = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x51A0, /* IFE2_NRDI_QOSGEN_SHAPING_LOW */
		@@ -455,6 +483,7 @@ static struct cam_camnoc_specific
		},
		.qosgen_shaping_high = {
		.enable = true,
		.is_fuse_based = true,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x51A4, /* IFE2_NRDI_QOSGEN_SHAPING_HIGH */
		@@ -466,6 +495,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2E30, /* IPE_BPS_LRME_RD_PRIORITYLUT_LOW */
		@@ -473,6 +503,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2E34, /* IPE_BPS_LRME_RD_PRIORITYLUT_HIGH */
		@@ -480,6 +511,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x2E38, /* IPE_BPS_LRME_RD_URGENCY_LOW */
		@@ -491,6 +523,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2E40, /* IPE_BPS_LRME_RD_DANGERLUT_LOW */
		@@ -498,6 +531,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2E48, /* IPE_BPS_LRME_RD_SAFELUT_LOW */
		@@ -510,6 +544,7 @@ static struct cam_camnoc_specific
		* register settings.
		*/
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2F08, /* IPE_BPS_LRME_RD_DECCTL_LOW */
		@@ -521,6 +556,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2A30, /* IPE_BPS_LRME_WR_PRIORITYLUT_LOW */
		@@ -528,6 +564,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2A34, /* IPE_BPS_LRME_WR_PRIORITYLUT_HIGH */
		@@ -535,6 +572,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x2A38, /* IPE_BPS_LRME_WR_URGENCY_LOW */
		@@ -546,6 +584,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2A40, /* IPE_BPS_LRME_WR_DANGERLUT_LOW */
		@@ -553,6 +592,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2A48, /* IPE_BPS_LRME_WR_SAFELUT_LOW */
		@@ -565,6 +605,7 @@ static struct cam_camnoc_specific
		* register settings.
		*/
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2B88, /* IPE_BPS_LRME_WR_ENCCTL_LOW */
		@@ -576,6 +617,7 @@ static struct cam_camnoc_specific
		.enable = true,
		.priority_lut_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2630, /* JPEG_PRIORITYLUT_LOW */
		@@ -583,6 +625,7 @@ static struct cam_camnoc_specific
		},
		.priority_lut_high = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2634, /* JPEG_PRIORITYLUT_HIGH */
		@@ -590,6 +633,7 @@ static struct cam_camnoc_specific
		},
		.urgency = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 1,
		.offset = 0x2638, /* JPEG_URGENCY_LOW */
		@@ -599,6 +643,7 @@ static struct cam_camnoc_specific
		},
		.danger_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2640, /* JPEG_DANGERLUT_LOW */
		@@ -606,6 +651,7 @@ static struct cam_camnoc_specific
		},
		.safe_lut = {
		.enable = false,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_READ_WRITE,
		.masked_value = 0,
		.offset = 0x2648, /* JPEG_SAFELUT_LOW */
		@@ -613,6 +659,7 @@ static struct cam_camnoc_specific
		},
		.ubwc_ctl = {
		.enable = false,
		.is_fuse_based = false,
		},
		},
		{
		@@ -621,6 +668,7 @@ static struct cam_camnoc_specific
		.enable = false,
		.flag_out_set0_low = {
		.enable = true,
		.is_fuse_based = false,
		.access_type = CAM_REG_TYPE_WRITE,
		.masked_value = 0,
		.offset = 0x5088,