Merge drm/drm-next into drm-misc-next

- compatible : Shall contain one of

  - "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders

  - "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders

  - "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders

  - "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders

  - "renesas,r8a7793-lvds" for R8A7793 (R-Car M2-N) compatible LVDS encoders

- clock-names: Name of the clocks. This property is model-dependent.

  - The functional clock, which mandatory for all models, shall be listed

    first, and shall be named "fck".

  - On R8A77990 and R8A77995, the LVDS encoder can use the EXTAL or

  - On R8A77990, R8A77995 and R8A774C0, the LVDS encoder can use the EXTAL or

    DU_DOTCLKINx clocks. Those clocks are optional. When supplied they must be

    named "extal" and "dclkin.x" respectively, with "x" being the DU_DOTCLKIN

    numerical index.

    - "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU

    - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU

    - "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU

    - "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU

    - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU

    - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU

    - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU

 R8A7744 (RZ/G1N)       DPAD 0         LVDS 0         -              -

 R8A7745 (RZ/G1E)       DPAD 0         DPAD 1         -              -

 R8A77470 (RZ/G1C)      DPAD 0         DPAD 1         LVDS 0         -

 R8A774C0 (RZ/G2E)      DPAD 0         LVDS 0         LVDS 1         -

 R8A7779 (R-Car H1)     DPAD 0         DPAD 1         -              -

 R8A7790 (R-Car H2)     DPAD 0         LVDS 0         LVDS 1         -

 R8A7791 (R-Car M2-W)   DPAD 0         LVDS 0         -              -

#include <linux/export.h>

#include <linux/acpi.h>

#include <linux/mfd/intel_soc_pmic.h>

#include <linux/regmap.h>

#include <acpi/acpi_lpat.h>

#include "intel_pmic.h"

	struct intel_pmic_regs_handler_ctx ctx;

};

static struct intel_pmic_opregion *intel_pmic_opregion;

static int pmic_get_reg_bit(int address, struct pmic_table *table,

			    int count, int *reg, int *bit)

{

	}

	opregion->data = d;

	intel_pmic_opregion = opregion;

	return 0;

out_remove_thermal_handler:

	return ret;

}

EXPORT_SYMBOL_GPL(intel_pmic_install_opregion_handler);

/**

 * intel_soc_pmic_exec_mipi_pmic_seq_element - Execute PMIC MIPI sequence

 * @i2c_address:  I2C client address for the PMIC

 * @reg_address:  PMIC register address

 * @value:        New value for the register bits to change

 * @mask:         Mask indicating which register bits to change

 *

 * DSI LCD panels describe an initialization sequence in the i915 VBT (Video

 * BIOS Tables) using so called MIPI sequences. One possible element in these

 * sequences is a PMIC specific element of 15 bytes.

 *

 * This function executes these PMIC specific elements sending the embedded

 * commands to the PMIC.

 *

 * Return 0 on success, < 0 on failure.

 */

int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address,

					      u32 value, u32 mask)

{

	struct intel_pmic_opregion_data *d;

	int ret;

	if (!intel_pmic_opregion) {

		pr_warn("%s: No PMIC registered\n", __func__);

		return -ENXIO;

	}

	d = intel_pmic_opregion->data;

	mutex_lock(&intel_pmic_opregion->lock);

	if (d->exec_mipi_pmic_seq_element) {

		ret = d->exec_mipi_pmic_seq_element(intel_pmic_opregion->regmap,

						    i2c_address, reg_address,

						    value, mask);

	} else if (d->pmic_i2c_address) {

		if (i2c_address == d->pmic_i2c_address) {

			ret = regmap_update_bits(intel_pmic_opregion->regmap,

						 reg_address, mask, value);

		} else {

			pr_err("%s: Unexpected i2c-addr: 0x%02x (reg-addr 0x%x value 0x%x mask 0x%x)\n",

			       __func__, i2c_address, reg_address, value, mask);

			ret = -ENXIO;

		}

	} else {

		pr_warn("%s: Not implemented\n", __func__);

		pr_warn("%s: i2c-addr: 0x%x reg-addr 0x%x value 0x%x mask 0x%x\n",

			__func__, i2c_address, reg_address, value, mask);

		ret = -EOPNOTSUPP;

	}

	mutex_unlock(&intel_pmic_opregion->lock);

	return ret;

}

EXPORT_SYMBOL_GPL(intel_soc_pmic_exec_mipi_pmic_seq_element);

	int (*update_aux)(struct regmap *r, int reg, int raw_temp);

	int (*get_policy)(struct regmap *r, int reg, int bit, u64 *value);

	int (*update_policy)(struct regmap *r, int reg, int bit, int enable);

	int (*exec_mipi_pmic_seq_element)(struct regmap *r, u16 i2c_address,

					  u32 reg_address, u32 value, u32 mask);

	struct pmic_table *power_table;

	int power_table_count;

	struct pmic_table *thermal_table;

	int thermal_table_count;

	/* For generic exec_mipi_pmic_seq_element handling */

	int pmic_i2c_address;

};

int intel_pmic_install_opregion_handler(struct device *dev, acpi_handle handle, struct regmap *regmap, struct intel_pmic_opregion_data *d);

	return regmap_update_bits(regmap, reg, bitmask, on ? 1 : 0);

}

static int intel_cht_wc_exec_mipi_pmic_seq_element(struct regmap *regmap,

						   u16 i2c_client_address,

						   u32 reg_address,

						   u32 value, u32 mask)

{

	u32 address;

	if (i2c_client_address > 0xff || reg_address > 0xff) {

		pr_warn("%s warning addresses too big client 0x%x reg 0x%x\n",

			__func__, i2c_client_address, reg_address);

		return -ERANGE;

	}

	address = (i2c_client_address << 8) | reg_address;

	return regmap_update_bits(regmap, address, mask, value);

}

/*

 * The thermal table and ops are empty, we do not support the Thermal opregion

 * (DPTF) due to lacking documentation.

static struct intel_pmic_opregion_data intel_cht_wc_pmic_opregion_data = {

	.get_power		= intel_cht_wc_pmic_get_power,

	.update_power		= intel_cht_wc_pmic_update_power,

	.exec_mipi_pmic_seq_element = intel_cht_wc_exec_mipi_pmic_seq_element,

	.power_table		= power_table,

	.power_table_count	= ARRAY_SIZE(power_table),

};