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Commit d28bdaff authored Jun 20, 2019 by Greg Kroah-Hartman

Merge tag 'fixes-for-v5.2-rc5' of...

Merge tag 'fixes-for-v5.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb

 into usb-linus

Felipe writes:

usb: fixes for v5.2-rc5

A single fix to take into account the PHY width during initialization of
dwc2 driver. This change allows deviceTree to pass PHY width if
necessary.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>

* tag 'fixes-for-v5.2-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb:
  usb: dwc2: Use generic PHY width in params setup

parents ddd57980 42de8afc

drivers/usb/dwc2/params.c

+9 −0

Original line number	Diff line number	Diff line
		@@ -253,6 +253,15 @@ static void dwc2_set_param_phy_utmi_width(struct dwc2_hsotg *hsotg)
		val = (hsotg->hw_params.utmi_phy_data_width ==
		GHWCFG4_UTMI_PHY_DATA_WIDTH_8) ? 8 : 16;

		if (hsotg->phy) {
		/*
		* If using the generic PHY framework, check if the PHY bus
		* width is 8-bit and set the phyif appropriately.
		*/
		if (phy_get_bus_width(hsotg->phy) == 8)
		val = 8;
		}

		hsotg->params.phy_utmi_width = val;
		}

drivers/usb/dwc2/platform.c

+0 −9

Original line number	Diff line number	Diff line
		@@ -271,15 +271,6 @@ static int dwc2_lowlevel_hw_init(struct dwc2_hsotg *hsotg)

		hsotg->plat = dev_get_platdata(hsotg->dev);

		if (hsotg->phy) {
		/*
		* If using the generic PHY framework, check if the PHY bus
		* width is 8-bit and set the phyif appropriately.
		*/
		if (phy_get_bus_width(hsotg->phy) == 8)
		hsotg->params.phy_utmi_width = 8;
		}

		/* Clock */
		hsotg->clk = devm_clk_get_optional(hsotg->dev, "otg");
		if (IS_ERR(hsotg->clk)) {