Loading bindings/iommu/arm,smmu.txt +0 −7 Original line number Diff line number Diff line Loading @@ -182,13 +182,6 @@ conditions. that interconnect votes will be maintained irrespective of the CPUSS' state (awake or asleep). - qcom,power-always-on: Boolean property which indicates that votes for power resources (i.e. regulators, clocks, buses) should always be maintained. This is required when the latency for the SMMU's operation is greatly increased by adding and removing votes for power resources. ** Deprecated properties: - mmu-masters (deprecated in favour of the generic "iommus" binding) : Loading qcom/msm-arm-smmu-holi.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,6 @@ #iommu-cells = <1>; qcom,use-3-lvl-tables; #global-interrupts = <2>; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clock-names = "gcc_gpu_memnoc_gfx_clk"; Loading qcom/msm-arm-smmu-lahaina.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,6 @@ #address-cells = <1>; ranges; dma-coherent; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cc_cx_gdsc>; Loading qcom/msm-arm-smmu-shima.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,6 @@ #address-cells = <1>; ranges; dma-coherent; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; Loading qcom/msm-arm-smmu-yupik.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,6 @@ #address-cells = <1>; ranges; dma-coherent; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, Loading Loading
bindings/iommu/arm,smmu.txt +0 −7 Original line number Diff line number Diff line Loading @@ -182,13 +182,6 @@ conditions. that interconnect votes will be maintained irrespective of the CPUSS' state (awake or asleep). - qcom,power-always-on: Boolean property which indicates that votes for power resources (i.e. regulators, clocks, buses) should always be maintained. This is required when the latency for the SMMU's operation is greatly increased by adding and removing votes for power resources. ** Deprecated properties: - mmu-masters (deprecated in favour of the generic "iommus" binding) : Loading
qcom/msm-arm-smmu-holi.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -7,7 +7,6 @@ #iommu-cells = <1>; qcom,use-3-lvl-tables; #global-interrupts = <2>; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clock-names = "gcc_gpu_memnoc_gfx_clk"; Loading
qcom/msm-arm-smmu-lahaina.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,6 @@ #address-cells = <1>; ranges; dma-coherent; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cc_cx_gdsc>; Loading
qcom/msm-arm-smmu-shima.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,6 @@ #address-cells = <1>; ranges; dma-coherent; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; Loading
qcom/msm-arm-smmu-yupik.dtsi +0 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,6 @@ #address-cells = <1>; ranges; dma-coherent; qcom,power-always-on; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, Loading