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Commit cf9b0772 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC driver updates from Arnd Bergmann:
 "This branch contains platform-related driver updates for ARM and
  ARM64, these are the areas that bring the changes:

  New drivers:

   - driver support for Renesas R-Car V3M (R8A77970)

   - power management support for Amlogic GX

   - a new driver for the Tegra BPMP thermal sensor

   - a new bus driver for Technologic Systems NBUS

  Changes for subsystems that prefer to merge through arm-soc:

   - the usual updates for reset controller drivers from Philipp Zabel,
     with five added drivers for SoCs in the arc, meson, socfpa,
     uniphier and mediatek families

   - updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
     Heiner Kallweit and Lorenzo Pieralisi

  Changes specific to some ARM-based SoC

   - the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on
     ARM as well

   - several changes for power management on Broadcom SoCs

   - various improvements on Qualcomm, Broadcom, Amlogic, Atmel,
     Mediatek

   - minor Cleanups for Samsung, TI OMAP SoCs"

[ NOTE! This doesn't work without the previous ARM SoC device-tree pull,
  because the R8A77970 driver is missing a header file that came from
  that pull.

  The fact that this got merged afterwards only fixes it at this point,
  and bisection of that driver will fail if/when you walk into the
  history of that driver.           - Linus ]

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits)
  soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
  bus: add driver for the Technologic Systems NBUS
  memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()
  soc: qcom: remove unused label
  soc: amlogic: gx pm domain: add PM and OF dependencies
  drivers/firmware: psci_checker: Add missing destroy_timer_on_stack()
  dt-bindings: power: add amlogic meson power domain bindings
  soc: amlogic: add Meson GX VPU Domains driver
  soc: qcom: Remote filesystem memory driver
  dt-binding: soc: qcom: Add binding for rmtfs memory
  of: reserved_mem: Accessor for acquiring reserved_mem
  of/platform: Generalize /reserved-memory handling
  soc: mediatek: pwrap: fix fatal compiler error
  soc: mediatek: pwrap: fix compiler errors
  arm64: mediatek: cleanup message for platform selection
  soc: Allow test-building of MediaTek drivers
  soc: mediatek: place Kconfig for all SoC drivers under menu
  soc: mediatek: pwrap: add support for MT7622 SoC
  soc: mediatek: pwrap: add common way for setup CS timing extenstion
  soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
  ..
parents 527d1470 339cd0ea

Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt

+5 −1
Original line number Diff line number Diff line
@@ -164,6 +164,8 @@ Control registers for this memory controller's DDR PHY. 


Required properties:

- compatible     : should contain one of these

	"brcm,brcmstb-ddr-phy-v71.1"

	"brcm,brcmstb-ddr-phy-v72.0"

	"brcm,brcmstb-ddr-phy-v225.1"

	"brcm,brcmstb-ddr-phy-v240.1"

	"brcm,brcmstb-ddr-phy-v240.2"
@@ -184,7 +186,9 @@ Sequencer DRAM parameters and control registers. Used for Self-Refresh 
Power-Down (SRPD), among other things.



Required properties:

- compatible     : should contain "brcm,brcmstb-memc-ddr"

- compatible     : should contain one of these

	"brcm,brcmstb-memc-ddr-rev-b.2.2"

	"brcm,brcmstb-memc-ddr"

- reg            : the MEMC DDR register range



Example:

Documentation/devicetree/bindings/arm/samsung/pmu.txt

+0 −1
Original line number Diff line number Diff line
@@ -4,7 +4,6 @@ Properties: 
 - compatible : should contain two values. First value must be one from following list:

		   - "samsung,exynos3250-pmu" - for Exynos3250 SoC,

		   - "samsung,exynos4210-pmu" - for Exynos4210 SoC,

		   - "samsung,exynos4212-pmu" - for Exynos4212 SoC,

		   - "samsung,exynos4412-pmu" - for Exynos4412 SoC,

		   - "samsung,exynos5250-pmu" - for Exynos5250 SoC,

		   - "samsung,exynos5260-pmu" - for Exynos5260 SoC.

Documentation/devicetree/bindings/firmware/qcom,scm.txt

+2 −0
Original line number Diff line number Diff line
@@ -18,6 +18,8 @@ Required properties: 
 * Core, iface, and bus clocks required for "qcom,scm"

- clock-names: Must contain "core" for the core clock, "iface" for the interface

  clock and "bus" for the bus clock per the requirements of the compatible.

- qcom,dload-mode: phandle to the TCSR hardware block and offset of the

		   download mode control register (optional)



Example for MSM8916:

Documentation/devicetree/bindings/memory-controllers/brcm,dpfe-cpu.txt

0 → 100644
+27 −0
Original line number Diff line number Diff line 
DDR PHY Front End (DPFE) for Broadcom STB

=========================================



DPFE and the DPFE firmware provide an interface for the host CPU to

communicate with the DCPU, which resides inside the DDR PHY.



There are three memory regions for interacting with the DCPU. These are

specified in a single reg property.



Required properties:

  - compatible: must be "brcm,bcm7271-dpfe-cpu", "brcm,bcm7268-dpfe-cpu"

    or "brcm,dpfe-cpu"

  - reg: must reference three register ranges

      - start address and length of the DCPU register space

      - start address and length of the DCPU data memory space

      - start address and length of the DCPU instruction memory space

  - reg-names: must contain "dpfe-cpu", "dpfe-dmem", and "dpfe-imem";

        they must be in the same order as the register declarations



Example:

	dpfe_cpu0: dpfe-cpu@f1132000 {

		compatible = "brcm,bcm7271-dpfe-cpu", "brcm,dpfe-cpu";

		reg =  <0xf1132000 0x180

			0xf1134000 0x1000

			0xf1138000 0x4000>;

		reg-names = "dpfe-cpu", "dpfe-dmem", "dpfe-imem";

	};

Documentation/devicetree/bindings/mips/brcm/soc.txt

+153 −0
Original line number Diff line number Diff line
@@ -11,3 +11,156 @@ Required properties: 


The experimental -viper variants are for running Linux on the 3384's

BMIPS4355 cable modem CPU instead of the BMIPS5000 application processor.



Power management

----------------



For power management (particularly, S2/S3/S5 system suspend), the following SoC

components are needed:



= Always-On control block (AON CTRL)



This hardware provides control registers for the "always-on" (even in low-power

modes) hardware, such as the Power Management State Machine (PMSM).



Required properties:

- compatible     : should be one of

		   "brcm,bcm7425-aon-ctrl"

		   "brcm,bcm7429-aon-ctrl"

		   "brcm,bcm7435-aon-ctrl" and

		   "brcm,brcmstb-aon-ctrl"

- reg            : the register start and length for the AON CTRL block



Example:



syscon@410000 {

	compatible = "brcm,bcm7425-aon-ctrl", "brcm,brcmstb-aon-ctrl";

	reg = <0x410000 0x400>;

};



= Memory controllers



A Broadcom STB SoC typically has a number of independent memory controllers,

each of which may have several associated hardware blocks, which are versioned

independently (control registers, DDR PHYs, etc.). One might consider

describing these controllers as a parent "memory controllers" block, which

contains N sub-nodes (one for each controller in the system), each of which is

associated with a number of hardware register resources (e.g., its PHY.



== MEMC (MEMory Controller)



Represents a single memory controller instance.



Required properties:

- compatible     : should contain "brcm,brcmstb-memc" and "simple-bus"

- ranges	 : should contain the child address in the parent address

		   space, must be 0 here, and the register start and length of

		   the entire memory controller (including all sub nodes: DDR PHY,

		   arbiter, etc.)

- #address-cells : must be 1

- #size-cells	 : must be 1



Example:



	memory-controller@0 {

		compatible = "brcm,brcmstb-memc", "simple-bus";

		ranges = <0x0 0x0 0xa000>;

		#address-cells = <1>;

		#size-cells = <1>;



		memc-arb@1000 {

			...

		};



		memc-ddr@2000 {

			...

		};



		ddr-phy@6000 {

			...

		};

	};



Should contain subnodes for any of the following relevant hardware resources:



== DDR PHY control



Control registers for this memory controller's DDR PHY.



Required properties:

- compatible     : should contain one of these

		   "brcm,brcmstb-ddr-phy-v64.5"

		   "brcm,brcmstb-ddr-phy"



- reg            : the DDR PHY register range and length



Example:



	ddr-phy@6000 {

		compatible = "brcm,brcmstb-ddr-phy-v64.5";

		reg = <0x6000 0xc8>;

	};



== DDR memory controller sequencer



Control registers for this memory controller's DDR memory sequencer



Required properties:

- compatible     : should contain one of these

		   "brcm,bcm7425-memc-ddr"

		   "brcm,bcm7429-memc-ddr"

		   "brcm,bcm7435-memc-ddr" and

		   "brcm,brcmstb-memc-ddr"



- reg            : the DDR sequencer register range and length



Example:



	memc-ddr@2000 {

		compatible = "brcm,bcm7425-memc-ddr", "brcm,brcmstb-memc-ddr";

		reg = <0x2000 0x300>;

	};



== MEMC Arbiter



The memory controller arbiter is responsible for memory clients allocation

(bandwidth, priorities etc.) and needs to have its contents restored during

deep sleep states (S3).



Required properties:



- compatible	: should contain one of these

		  "brcm,brcmstb-memc-arb-v10.0.0.0"

		  "brcm,brcmstb-memc-arb"



- reg		: the DDR Arbiter register range and length



Example:



	memc-arb@1000 {

		compatible = "brcm,brcmstb-memc-arb-v10.0.0.0";

		reg = <0x1000 0x248>;

	};



== Timers



The Broadcom STB chips contain a timer block with several general purpose

timers that can be used.



Required properties:



- compatible	: should contain one of:

		  "brcm,bcm7425-timers"

		  "brcm,bcm7429-timers"

		  "brcm,bcm7435-timers and

		  "brcm,brcmstb-timers"

- reg		: the timers register range

- interrupts	: the interrupt line for this timer block



Example:



	timers: timer@4067c0 {

		compatible = "brcm,bcm7425-timers", "brcm,brcmstb-timers";

		reg = <0x4067c0 0x40>;

		interrupts = <&periph_intc 19>;

	};