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Commit cf75b8f2 authored by Thierry Reding's avatar Thierry Reding Committed by Linus Walleij
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pinctrl: tegra: Add bitmask support for parked bits



Some pin groups have park bits for multiple pins in one register.
Support this by turning the parked bit field into a parked bitmask
field. If no parked bits are supported, the bitmask can be 0.

Update the pingroup table on Tegra210, which is the only generation
where this is supported, with the parked bitmask.

Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
Tested-by: default avatarDmitry Osipenko <digetx@gmail.com>
Reviewed-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 55bd054c
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+14 −4
Original line number Diff line number Diff line
@@ -621,10 +621,20 @@ static void tegra_pinctrl_clear_parked_bits(struct tegra_pmx *pmx)

	for (i = 0; i < pmx->soc->ngroups; ++i) {
		g = &pmx->soc->groups[i];
		if (g->parked_bit >= 0) {
			val = pmx_readl(pmx, g->mux_bank, g->mux_reg);
			val &= ~(1 << g->parked_bit);
			pmx_writel(pmx, val, g->mux_bank, g->mux_reg);
		if (g->parked_bitmask > 0) {
			unsigned int bank, reg;

			if (g->mux_reg != -1) {
				bank = g->mux_bank;
				reg = g->mux_reg;
			} else {
				bank = g->drv_bank;
				reg = g->drv_reg;
			}

			val = pmx_readl(pmx, bank, reg);
			val &= ~g->parked_bitmask;
			pmx_writel(pmx, val, bank, reg);
		}
	}
}
+2 −2
Original line number Diff line number Diff line
@@ -104,7 +104,6 @@ struct tegra_function {
 * @tri_reg:		Tri-state register offset.
 * @tri_bank:		Tri-state register bank.
 * @tri_bit:		Tri-state register bit.
 * @parked_bit:		Parked register bit. -1 if unsupported.
 * @einput_bit:		Enable-input register bit.
 * @odrain_bit:		Open-drain register bit.
 * @lock_bit:		Lock register bit.
@@ -126,6 +125,7 @@ struct tegra_function {
 * @slwf_bit:		Slew Falling register bit.
 * @slwf_width:		Slew Falling field width.
 * @drvtype_bit:	Drive type register bit.
 * @parked_bitmask:	Parked register mask. 0 if unsupported.
 *
 * -1 in a *_reg field means that feature is unsupported for this group.
 * *_bank and *_reg values are irrelevant when *_reg is -1.
@@ -154,7 +154,6 @@ struct tegra_pingroup {
	s32 mux_bit:6;
	s32 pupd_bit:6;
	s32 tri_bit:6;
	s32 parked_bit:6;
	s32 einput_bit:6;
	s32 odrain_bit:6;
	s32 lock_bit:6;
@@ -172,6 +171,7 @@ struct tegra_pingroup {
	s32 drvup_width:6;
	s32 slwr_width:6;
	s32 slwf_width:6;
	u32 parked_bitmask;
};

/**
+2 −2
Original line number Diff line number Diff line
@@ -1580,8 +1580,8 @@ static struct tegra_function tegra114_functions[] = {
		.lock_bit = 7,						\
		.ioreset_bit = PINGROUP_BIT_##ior(8),			\
		.rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9),		\
		.parked_bit = -1,					\
		.drv_reg = -1,						\
		.parked_bitmask = 0,					\
	}

#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b,	\
@@ -1601,7 +1601,6 @@ static struct tegra_function tegra114_functions[] = {
		.rcv_sel_bit = -1,					\
		.drv_reg = DRV_PINGROUP_REG(r),				\
		.drv_bank = 0,						\
		.parked_bit = -1,					\
		.hsm_bit = hsm_b,					\
		.schmitt_bit = schmitt_b,				\
		.lpmd_bit = lpmd_b,					\
@@ -1614,6 +1613,7 @@ static struct tegra_function tegra114_functions[] = {
		.slwf_bit = slwf_b,					\
		.slwf_width = slwf_w,					\
		.drvtype_bit = PINGROUP_BIT_##drvtype(6),		\
		.parked_bitmask = 0,					\
	}

static const struct tegra_pingroup tegra114_groups[] = {
+2 −2
Original line number Diff line number Diff line
@@ -1749,8 +1749,8 @@ static struct tegra_function tegra124_functions[] = {
		.lock_bit = 7,						\
		.ioreset_bit = PINGROUP_BIT_##ior(8),			\
		.rcv_sel_bit = PINGROUP_BIT_##rcv_sel(9),		\
		.parked_bit = -1,					\
		.drv_reg = -1,						\
		.parked_bitmask = 0,					\
	}

#define DRV_PINGROUP(pg_name, r, hsm_b, schmitt_b, lpmd_b, drvdn_b,	\
@@ -1770,7 +1770,6 @@ static struct tegra_function tegra124_functions[] = {
		.rcv_sel_bit = -1,					\
		.drv_reg = DRV_PINGROUP_REG(r),				\
		.drv_bank = 0,						\
		.parked_bit = -1,					\
		.hsm_bit = hsm_b,					\
		.schmitt_bit = schmitt_b,				\
		.lpmd_bit = lpmd_b,					\
@@ -1783,6 +1782,7 @@ static struct tegra_function tegra124_functions[] = {
		.slwf_bit = slwf_b,					\
		.slwf_width = slwf_w,					\
		.drvtype_bit = PINGROUP_BIT_##drvtype(6),		\
		.parked_bitmask = 0,					\
	}

#define MIPI_PAD_CTRL_PINGROUP(pg_name, r, b, f0, f1)			\
+2 −2
Original line number Diff line number Diff line
@@ -87,7 +87,6 @@ static struct tegra_function tegra194_functions[] = {
		.lpmd_bit = -1,					\
		.lock_bit = -1,					\
		.hsm_bit = -1,					\
		.parked_bit = -1,				\
		.mux_bank = bank,				\
		.mux_bit = 0,					\
		.pupd_reg = ((r)),		\
@@ -100,7 +99,8 @@ static struct tegra_function tegra194_functions[] = {
		.odrain_bit = e_od,				\
		.schmitt_bit = schmitt_b,			\
		.drvtype_bit = 13,				\
		.drv_reg = -1
		.drv_reg = -1,					\
		.parked_bitmask = 0

#define drive_pex_l5_clkreq_n_pgg0				\
	DRV_PINGROUP_ENTRY_Y(0x14004, 12, 5, 20, 5, -1, -1, -1, -1, 0)
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