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Commit cf24aac3 authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Vinod Koul
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dmaengine: rcar-dmac: Fix DMACHCLR handling if iommu is mapped 



The commit 20c169ac ("dmaengine: rcar-dmac: clear pertinence
number of channels") forgets to clear the last channel by
DMACHCLR in rcar_dmac_init() (and doesn't need to clear the first
channel) if iommu is mapped to the device. So, this patch fixes it
by using "channels_mask" bitfield.

Note that the hardware and driver don't support more than 32 bits
in DMACHCLR register anyway, so this patch should reject more than
32 channels in rcar_dmac_parse_of().

Fixes: 20c169ac ("dmaengine: rcar-dmac: clear pertinence number of channels")
Signed-off-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/1567424643-26629-1-git-send-email-yoshihiro.shimoda.uh@renesas.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 689379c2

drivers/dma/sh/rcar-dmac.c

+19 −9
Original line number Diff line number Diff line
@@ -192,6 +192,7 @@ struct rcar_dmac_chan { 
 * @iomem: remapped I/O memory base

 * @n_channels: number of available channels

 * @channels: array of DMAC channels

 * @channels_mask: bitfield of which DMA channels are managed by this driver

 * @modules: bitmask of client modules in use

 */

struct rcar_dmac {
@@ -202,6 +203,7 @@ struct rcar_dmac { 


	unsigned int n_channels;

	struct rcar_dmac_chan *channels;

	unsigned int channels_mask;



	DECLARE_BITMAP(modules, 256);

};
@@ -438,7 +440,7 @@ static int rcar_dmac_init(struct rcar_dmac *dmac) 
	u16 dmaor;



	/* Clear all channels and enable the DMAC globally. */

	rcar_dmac_write(dmac, RCAR_DMACHCLR, GENMASK(dmac->n_channels - 1, 0));

	rcar_dmac_write(dmac, RCAR_DMACHCLR, dmac->channels_mask);

	rcar_dmac_write(dmac, RCAR_DMAOR,

			RCAR_DMAOR_PRI_FIXED | RCAR_DMAOR_DME);
@@ -814,6 +816,9 @@ static void rcar_dmac_stop_all_chan(struct rcar_dmac *dmac) 
	for (i = 0; i < dmac->n_channels; ++i) {

		struct rcar_dmac_chan *chan = &dmac->channels[i];



		if (!(dmac->channels_mask & BIT(i)))

			continue;



		/* Stop and reinitialize the channel. */

		spin_lock_irq(&chan->lock);

		rcar_dmac_chan_halt(chan);
@@ -1776,6 +1781,8 @@ static int rcar_dmac_chan_probe(struct rcar_dmac *dmac, 
	return 0;

}



#define RCAR_DMAC_MAX_CHANNELS	32



static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac)

{

	struct device_node *np = dev->of_node;
@@ -1787,12 +1794,16 @@ static int rcar_dmac_parse_of(struct device *dev, struct rcar_dmac *dmac) 
		return ret;

	}



	if (dmac->n_channels <= 0 || dmac->n_channels >= 100) {

	/* The hardware and driver don't support more than 32 bits in CHCLR */

	if (dmac->n_channels <= 0 ||

	    dmac->n_channels >= RCAR_DMAC_MAX_CHANNELS) {

		dev_err(dev, "invalid number of channels %u\n",

			dmac->n_channels);

		return -EINVAL;

	}



	dmac->channels_mask = GENMASK(dmac->n_channels - 1, 0);



	return 0;

}
@@ -1802,7 +1813,6 @@ static int rcar_dmac_probe(struct platform_device *pdev) 
		DMA_SLAVE_BUSWIDTH_2_BYTES | DMA_SLAVE_BUSWIDTH_4_BYTES |

		DMA_SLAVE_BUSWIDTH_8_BYTES | DMA_SLAVE_BUSWIDTH_16_BYTES |

		DMA_SLAVE_BUSWIDTH_32_BYTES | DMA_SLAVE_BUSWIDTH_64_BYTES;

	unsigned int channels_offset = 0;

	struct dma_device *engine;

	struct rcar_dmac *dmac;

	struct resource *mem;
@@ -1831,10 +1841,8 @@ static int rcar_dmac_probe(struct platform_device *pdev) 
	 * level we can't disable it selectively, so ignore channel 0 for now if

	 * the device is part of an IOMMU group.

	 */

	if (device_iommu_mapped(&pdev->dev)) {

		dmac->n_channels--;

		channels_offset = 1;

	}

	if (device_iommu_mapped(&pdev->dev))

		dmac->channels_mask &= ~BIT(0);



	dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,

				      sizeof(*dmac->channels), GFP_KERNEL);
@@ -1892,8 +1900,10 @@ static int rcar_dmac_probe(struct platform_device *pdev) 
	INIT_LIST_HEAD(&engine->channels);



	for (i = 0; i < dmac->n_channels; ++i) {

		ret = rcar_dmac_chan_probe(dmac, &dmac->channels[i],

					   i + channels_offset);

		if (!(dmac->channels_mask & BIT(i)))

			continue;



		ret = rcar_dmac_chan_probe(dmac, &dmac->channels[i], i);

		if (ret < 0)

			goto error;

	}