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Commit ce611ef8 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Improve PCBR debug information 



Always print the final PCBR register value on both vlv and chv, and
also tell us whether the BIOS was a good citizen or not.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarDeepak <S&lt;deepak.s@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 8d40c3ae

drivers/gpu/drm/i915/intel_pm.c

+6 −2
Original line number Diff line number Diff line
@@ -5062,12 +5062,15 @@ static void cherryview_setup_pctx(struct drm_device *dev) 


	pcbr = I915_READ(VLV_PCBR);

	if ((pcbr >> VLV_PCBR_ADDR_SHIFT) == 0) {

		DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");

		paddr = (dev_priv->mm.stolen_base +

			 (gtt->stolen_size - pctx_size));



		pctx_paddr = (paddr & (~4095));

		I915_WRITE(VLV_PCBR, pctx_paddr);

	}



	DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR));

}



static void valleyview_setup_pctx(struct drm_device *dev)
@@ -5093,6 +5096,8 @@ static void valleyview_setup_pctx(struct drm_device *dev) 
		goto out;

	}



	DRM_DEBUG_DRIVER("BIOS didn't set up PCBR, fixing up\n");



	/*

	 * From the Gunit register HAS:

	 * The Gfx driver is expected to program this register and ensure
@@ -5111,6 +5116,7 @@ static void valleyview_setup_pctx(struct drm_device *dev) 
	I915_WRITE(VLV_PCBR, pctx_paddr);



out:

	DRM_DEBUG_DRIVER("PCBR: 0x%08x\n", I915_READ(VLV_PCBR));

	dev_priv->vlv_pctx = pctx;

}
@@ -5302,8 +5308,6 @@ static void cherryview_enable_rps(struct drm_device *dev) 
	/* For now we assume BIOS is allocating and populating the PCBR  */

	pcbr = I915_READ(VLV_PCBR);



	DRM_DEBUG_DRIVER("PCBR offset : 0x%x\n", pcbr);



	/* 3: Enable RC6 */

	if ((intel_enable_rc6(dev) & INTEL_RC6_ENABLE) &&

						(pcbr >> VLV_PCBR_ADDR_SHIFT))