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Commit ce4cdbe4 authored by Dmitry Bogdanov's avatar Dmitry Bogdanov Committed by David S. Miller
Browse files

net: aquantia: fixups on 64bit dma counters 



DMA counters are 64 bit and we can fetch that to reduce
counter overflow, espesially on byte counters.

Tested-by: default avatarNikita Danilov <ndanilov@aquantia.com>
Signed-off-by: default avatarIgor Russkikh <igor.russkikh@aquantia.com>
Signed-off-by: default avatarDmitry Bogdanov <dmitry.bogdanov@aquantia.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent f55d477b

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.c

+12 −0
Original line number Diff line number Diff line
@@ -53,6 +53,18 @@ void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value) 
	writel(value, hw->mmio + reg);

}



/* Most of 64-bit registers are in LSW, MSW form.

   Counters are normally implemented by HW as latched pairs:

   reading LSW first locks MSW, to overcome LSW overflow

 */

u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg)

{

	u64 value = aq_hw_read_reg(hw, reg);



	value |= (u64)aq_hw_read_reg(hw, reg + 4) << 32;

	return value;

}



int aq_hw_err_from_flags(struct aq_hw_s *hw)

{

	int err = 0;

drivers/net/ethernet/aquantia/atlantic/aq_hw_utils.h

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ void aq_hw_write_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, 
u32 aq_hw_read_reg_bit(struct aq_hw_s *aq_hw, u32 addr, u32 msk, u32 shift);

u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);

void aq_hw_write_reg(struct aq_hw_s *hw, u32 reg, u32 value);

u64 aq_hw_read_reg64(struct aq_hw_s *hw, u32 reg);

int aq_hw_err_from_flags(struct aq_hw_s *hw);



#endif /* AQ_HW_UTILS_H */

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.c

+8 −33
Original line number Diff line number Diff line
@@ -49,11 +49,6 @@ u32 hw_atl_glb_soft_res_get(struct aq_hw_s *aq_hw) 
				  HW_ATL_GLB_SOFT_RES_SHIFT);

}



u32 hw_atl_reg_rx_dma_stat_counter7get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_RX_DMA_STAT_COUNTER7_ADR);

}



u32 hw_atl_reg_glb_mif_id_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MIF_ID_ADR);
@@ -65,44 +60,24 @@ u32 hw_atl_rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw_s *aq_hw) 
	return aq_hw_read_reg(aq_hw, HW_ATL_RPB_RX_DMA_DROP_PKT_CNT_ADR);

}



u32 hw_atl_stats_rx_dma_good_octet_counterlsw_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_OCTET_COUNTERLSW);

}



u32 hw_atl_stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_PKT_COUNTERLSW);

}



u32 hw_atl_stats_tx_dma_good_octet_counterlsw_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_OCTET_COUNTERLSW);

}



u32 hw_atl_stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_PKT_COUNTERLSW);

}



u32 hw_atl_stats_rx_dma_good_octet_countermsw_get(struct aq_hw_s *aq_hw)

u64 hw_atl_stats_rx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_OCTET_COUNTERMSW);

	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_OCTET_COUNTERLSW);

}



u32 hw_atl_stats_rx_dma_good_pkt_countermsw_get(struct aq_hw_s *aq_hw)

u64 hw_atl_stats_rx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_PKT_COUNTERMSW);

	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_RX_DMA_GOOD_PKT_COUNTERLSW);

}



u32 hw_atl_stats_tx_dma_good_octet_countermsw_get(struct aq_hw_s *aq_hw)

u64 hw_atl_stats_tx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_OCTET_COUNTERMSW);

	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_OCTET_COUNTERLSW);

}



u32 hw_atl_stats_tx_dma_good_pkt_countermsw_get(struct aq_hw_s *aq_hw)

u64 hw_atl_stats_tx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw)

{

	return aq_hw_read_reg(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_PKT_COUNTERMSW);

	return aq_hw_read_reg64(aq_hw, HW_ATL_STATS_TX_DMA_GOOD_PKT_COUNTERLSW);

}



/* interrupt */

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh.h

+8 −23
Original line number Diff line number Diff line
@@ -40,29 +40,17 @@ u32 hw_atl_glb_soft_res_get(struct aq_hw_s *aq_hw); 


u32 hw_atl_rpb_rx_dma_drop_pkt_cnt_get(struct aq_hw_s *aq_hw);



/* get rx dma good octet counter lsw */

u32 hw_atl_stats_rx_dma_good_octet_counterlsw_get(struct aq_hw_s *aq_hw);

/* get rx dma good octet counter */

u64 hw_atl_stats_rx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw);



/* get rx dma good packet counter lsw */

u32 hw_atl_stats_rx_dma_good_pkt_counterlsw_get(struct aq_hw_s *aq_hw);

/* get rx dma good packet counter */

u64 hw_atl_stats_rx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw);



/* get tx dma good octet counter lsw */

u32 hw_atl_stats_tx_dma_good_octet_counterlsw_get(struct aq_hw_s *aq_hw);

/* get tx dma good octet counter */

u64 hw_atl_stats_tx_dma_good_octet_counter_get(struct aq_hw_s *aq_hw);



/* get tx dma good packet counter lsw */

u32 hw_atl_stats_tx_dma_good_pkt_counterlsw_get(struct aq_hw_s *aq_hw);



/* get rx dma good octet counter msw */

u32 hw_atl_stats_rx_dma_good_octet_countermsw_get(struct aq_hw_s *aq_hw);



/* get rx dma good packet counter msw */

u32 hw_atl_stats_rx_dma_good_pkt_countermsw_get(struct aq_hw_s *aq_hw);



/* get tx dma good octet counter msw */

u32 hw_atl_stats_tx_dma_good_octet_countermsw_get(struct aq_hw_s *aq_hw);



/* get tx dma good packet counter msw */

u32 hw_atl_stats_tx_dma_good_pkt_countermsw_get(struct aq_hw_s *aq_hw);

/* get tx dma good packet counter */

u64 hw_atl_stats_tx_dma_good_pkt_counter_get(struct aq_hw_s *aq_hw);



/* get msm rx errors counter register */

u32 hw_atl_reg_mac_msm_rx_errs_cnt_get(struct aq_hw_s *aq_hw);
@@ -82,9 +70,6 @@ u32 hw_atl_reg_mac_msm_rx_bcst_octets_counter1get(struct aq_hw_s *aq_hw); 
/* get msm rx unicast octets counter register 0 */

u32 hw_atl_reg_mac_msm_rx_ucst_octets_counter0get(struct aq_hw_s *aq_hw);



/* get rx dma statistics counter 7 */

u32 hw_atl_reg_rx_dma_stat_counter7get(struct aq_hw_s *aq_hw);



/* get msm tx errors counter register */

u32 hw_atl_reg_mac_msm_tx_errs_cnt_get(struct aq_hw_s *aq_hw);

drivers/net/ethernet/aquantia/atlantic/hw_atl/hw_atl_llh_internal.h

+0 −3
Original line number Diff line number Diff line
@@ -58,9 +58,6 @@ 
/* preprocessor definitions for msm rx unicast octets counter register 0 */

#define HW_ATL_MAC_MSM_RX_UCST_OCTETS_COUNTER0_ADR 0x000001b8u



/* preprocessor definitions for rx dma statistics counter 7 */

#define HW_ATL_RX_DMA_STAT_COUNTER7_ADR 0x00006818u



/* preprocessor definitions for msm tx unicast frames counter register */

#define HW_ATL_MAC_MSM_TX_UCST_FRM_CNT_ADR 0x00000108u