Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ce41b41e authored by Dan Carpenter's avatar Dan Carpenter Committed by Martin K. Petersen
Browse files

scsi: hisi_sas: shift vs compare typos 



There are some typos where we intended "<<" but have "<".  Seems likely
to cause a bunch of problems.

Fixes: d3b688d3 ("scsi: hisi_sas: add v2 hw support for ECC and AXI bus fatal error")
Signed-off-by: default avatarDan Carpenter <dan.carpenter@oracle.com>
Acked-by: default avatarJohn Garry <john.garry@huawei.com>
Signed-off-by: default avatarMartin K. Petersen <martin.petersen@oracle.com>
parent aa8c65a4

drivers/scsi/hisi_sas/hisi_sas_v2_hw.c

+6 −6
Original line number Diff line number Diff line
@@ -64,19 +64,19 @@ 
					 HGC_LM_DFX_STATUS2_ITCTLIST_OFF)

#define HGC_CQE_ECC_ADDR		0x13c

#define HGC_CQE_ECC_1B_ADDR_OFF	0

#define HGC_CQE_ECC_1B_ADDR_MSK	(0x3f < HGC_CQE_ECC_1B_ADDR_OFF)

#define HGC_CQE_ECC_1B_ADDR_MSK	(0x3f << HGC_CQE_ECC_1B_ADDR_OFF)

#define HGC_CQE_ECC_MB_ADDR_OFF	8

#define HGC_CQE_ECC_MB_ADDR_MSK (0x3f < HGC_CQE_ECC_MB_ADDR_OFF)

#define HGC_CQE_ECC_MB_ADDR_MSK (0x3f << HGC_CQE_ECC_MB_ADDR_OFF)

#define HGC_IOST_ECC_ADDR		0x140

#define HGC_IOST_ECC_1B_ADDR_OFF	0

#define HGC_IOST_ECC_1B_ADDR_MSK	(0x3ff < HGC_IOST_ECC_1B_ADDR_OFF)

#define HGC_IOST_ECC_1B_ADDR_MSK	(0x3ff << HGC_IOST_ECC_1B_ADDR_OFF)

#define HGC_IOST_ECC_MB_ADDR_OFF	16

#define HGC_IOST_ECC_MB_ADDR_MSK	(0x3ff < HGC_IOST_ECC_MB_ADDR_OFF)

#define HGC_IOST_ECC_MB_ADDR_MSK	(0x3ff << HGC_IOST_ECC_MB_ADDR_OFF)

#define HGC_DQE_ECC_ADDR		0x144

#define HGC_DQE_ECC_1B_ADDR_OFF	0

#define HGC_DQE_ECC_1B_ADDR_MSK	(0xfff < HGC_DQE_ECC_1B_ADDR_OFF)

#define HGC_DQE_ECC_1B_ADDR_MSK	(0xfff << HGC_DQE_ECC_1B_ADDR_OFF)

#define HGC_DQE_ECC_MB_ADDR_OFF	16

#define HGC_DQE_ECC_MB_ADDR_MSK (0xfff < HGC_DQE_ECC_MB_ADDR_OFF)

#define HGC_DQE_ECC_MB_ADDR_MSK (0xfff << HGC_DQE_ECC_MB_ADDR_OFF)

#define HGC_INVLD_DQE_INFO		0x148

#define HGC_INVLD_DQE_INFO_FB_CH0_OFF	9

#define HGC_INVLD_DQE_INFO_FB_CH0_MSK	(0x1 << HGC_INVLD_DQE_INFO_FB_CH0_OFF)