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Commit ce32edf8 authored by Can Guo's avatar Can Guo
Browse files

phy: qcom-ufs: add optional ref aux clk 



Newer platforms need an additional ref aux clk to be enabled, add support
for the new ref aux clk and make it optional as its not needed by other phy
versions.

Change-Id: I5e04980eb451b193e9c024bfe35383d10d17feff
Signed-off-by: default avatarVenkat Gopalakrishnan <venkatg@codeaurora.org>
[cang@codeaurora.org: resolved trivial merge conflicts]
Signed-off-by: default avatarCan Guo <cang@codeaurora.org>
parent 9e33a5d6

drivers/phy/qualcomm/phy-qcom-ufs-i.h

+1 −0
Original line number Diff line number Diff line
@@ -66,6 +66,7 @@ struct ufs_qcom_phy { 
	struct clk *ref_clk_src;

	struct clk *ref_clk_parent;

	struct clk *ref_clk;

	struct clk *ref_aux_clk;

	bool is_ref_clk_enabled;

	bool is_dev_ref_clk_enabled;

	struct ufs_qcom_phy_vreg vdda_pll;

drivers/phy/qualcomm/phy-qcom-ufs.c

+32 −0
Original line number Diff line number Diff line
@@ -211,7 +211,15 @@ int ufs_qcom_phy_init_clks(struct ufs_qcom_phy *phy_common) 


	err = ufs_qcom_phy_clk_get(phy_common->dev, "ref_clk",

				   &phy_common->ref_clk);

	if (err)

		goto out;



	/*

	 * "ref_aux_clk" is optional and only supported by certain

	 * phy versions, don't abort init if it's not found.

	 */

	 __ufs_qcom_phy_clk_get(phy_common->dev, "ref_aux_clk",

				   &phy_common->ref_aux_clk, false);

out:

	return err;

}
@@ -389,9 +397,26 @@ static int ufs_qcom_phy_enable_ref_clk(struct ufs_qcom_phy *phy) 
		goto out_disable_parent;

	}



	/*

	 * "ref_aux_clk" is optional clock and only supported by certain

	 * phy versions, hence make sure that clk reference is available

	 * before trying to enable the clock.

	 */

	if (phy->ref_aux_clk) {

		ret = clk_prepare_enable(phy->ref_aux_clk);

		if (ret) {

			dev_err(phy->dev, "%s: ref_aux_clk enable failed %d\n",

					__func__, ret);

			goto out_disable_ref;

		}

	}



	phy->is_ref_clk_enabled = true;

	goto out;



out_disable_ref:

	if (phy->ref_clk)

		clk_disable_unprepare(phy->ref_clk);

out_disable_parent:

	if (phy->ref_clk_parent)

		clk_disable_unprepare(phy->ref_clk_parent);
@@ -426,6 +451,13 @@ static int ufs_qcom_phy_disable_vreg(struct device *dev, 
static void ufs_qcom_phy_disable_ref_clk(struct ufs_qcom_phy *phy)

{

	if (phy->is_ref_clk_enabled) {

		/*

		 * "ref_aux_clk" is optional clock and only supported by

		 * certain phy versions, hence make sure that clk reference

		 * is available before trying to disable the clock.

		 */

		if (phy->ref_aux_clk)

			clk_disable_unprepare(phy->ref_aux_clk);

		clk_disable_unprepare(phy->ref_clk);

		/*

		 * "ref_clk_parent" is optional clock hence make sure that clk