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Commit cdfdd882 authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Greg Kroah-Hartman
Browse files

clk: qcom: gcc-qcs404: fix names of the DSI clocks used as parents 



[ Upstream commit 47d94d30cd3dcc743241b4208b1eec7247610c84 ]

The QCS404 uses 28nm LPM DSI PHY, which registers dsi0pll and
dsi0pllbyte clocks. Fix all DSI PHY clock names used as parents inside
the GCC driver.

Fixes: 652f1813 ("clk: qcom: gcc: Add global clock controller driver for QCS404")
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: default avatarBjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221226042154.2666748-7-dmitry.baryshkov@linaro.org


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent b419e913

drivers/clk/qcom/gcc-qcs404.c

+4 −4
Original line number Diff line number Diff line
@@ -112,7 +112,7 @@ static const struct parent_map gcc_parent_map_5[] = { 


static const char * const gcc_parent_names_5[] = {

	"cxo",

	"dsi0pll_byteclk_src",

	"dsi0pllbyte",

	"core_bi_pll_test_se",

};
@@ -124,7 +124,7 @@ static const struct parent_map gcc_parent_map_6[] = { 


static const char * const gcc_parent_names_6[] = {

	"cxo",

	"dsi0_phy_pll_out_byteclk",

	"dsi0pllbyte",

	"core_bi_pll_test_se",

};
@@ -167,7 +167,7 @@ static const struct parent_map gcc_parent_map_9[] = { 
static const char * const gcc_parent_names_9[] = {

	"cxo",

	"gpll0_out_main",

	"dsi0_phy_pll_out_dsiclk",

	"dsi0pll",

	"gpll6_out_aux",

	"core_bi_pll_test_se",

};
@@ -204,7 +204,7 @@ static const struct parent_map gcc_parent_map_12[] = { 


static const char * const gcc_parent_names_12[] = {

	"cxo",

	"dsi0pll_pclk_src",

	"dsi0pll",

	"core_bi_pll_test_se",

};