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Commit cdefb95b authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge tag 'phy-for-4.10' of...

Merge tag 'phy-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy

 into usb-next

Kishon writes:

phy: for 4.10

Merge contains:
 *) Add new usb2 phy driver for Meson8b and GXBB
 *) Remove phy drivers added for miphy365 and STiH415/6 (as support for
    these SoCs are removed from the kernel)
 *) Add a sysfs entry to facilitate usb role swap in rcar SoC
 *) Add support for otg port in rk3399
 *) misc fixes in various phy drivers and cleanups

Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parents 0edbf9e5 5e253dfb
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+15 −0
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What:		/sys/devices/platform/<phy-name>/role
Date:		October 2016
KernelVersion:	4.10
Contact:	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Description:
		This file can be read and write.
		The file can show/change the phy mode for role swap of usb.

		Write the following strings to change the mode:
		 "host" - switching mode from peripheral to host.
		 "peripheral" - switching mode from host to peripheral.

		Read the file, then it shows the following strings:
		 "host" - The mode is host now.
		 "peripheral" - The mode is peripheral now.
+3 −3
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* Amlogic USB2 PHY
* Amlogic Meson8b and GXBB USB2 PHY

Required properties:
- compatible:	Depending on the platform this should be one of:
@@ -16,10 +16,10 @@ Optional properties:

Example:

usb0_phy: usb_phy@0 {
usb0_phy: usb-phy@c0000000 {
	compatible = "amlogic,meson-gxbb-usb2-phy";
	#phy-cells = <0>;
	reg = <0x0 0x0 0x0 0x20>;
	reg = <0x0 0xc0000000 0x0 0x20>;
	resets = <&reset RESET_USB_OTG>;
	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
	clock-names = "usb_general", "usb";
+15 −18
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@@ -129,16 +129,6 @@ config PHY_MIPHY28LP
	  Enable this to support the miphy transceiver (for SATA/PCIE/USB3)
	  that is part of STMicroelectronics STiH407 SoC.

config PHY_MIPHY365X
	tristate "STMicroelectronics MIPHY365X PHY driver for STiH41x series"
	depends on ARCH_STI
	depends on HAS_IOMEM
	depends on OF
	select GENERIC_PHY
	help
	  Enable this to support the miphy transceiver (for SATA/PCIE)
	  that is part of STMicroelectronics STiH41x SoC series.

config PHY_RCAR_GEN2
	tristate "Renesas R-Car generation 2 USB PHY driver"
	depends on ARCH_RENESAS
@@ -373,7 +363,9 @@ config PHY_ROCKCHIP_INNO_USB2
	tristate "Rockchip INNO USB2PHY Driver"
	depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF
	depends on COMMON_CLK
	depends on USB_SUPPORT
	select GENERIC_PHY
	select USB_COMMON
	help
	  Support for Rockchip USB2.0 PHY with Innosilicon IP block.

@@ -438,14 +430,6 @@ config PHY_STIH407_USB
	  Enable this support to enable the picoPHY device used by USB2
	  and USB3 controllers on STMicroelectronics STiH407 SoC families.

config PHY_STIH41X_USB
	tristate "STMicroelectronics USB2 PHY driver for STiH41x series"
	depends on ARCH_STI
	select GENERIC_PHY
	help
	  Enable this to support the USB transceiver that is part of
	  STMicroelectronics STiH41x SoC series.

config PHY_QCOM_UFS
	tristate "Qualcomm UFS PHY driver"
	depends on OF && ARCH_QCOM
@@ -489,4 +473,17 @@ config PHY_NS2_PCIE
	help
	  Enable this to support the Broadcom Northstar2 PCIe PHY.
	  If unsure, say N.

config PHY_MESON8B_USB2
	tristate "Meson8b and GXBB USB2 PHY driver"
	default ARCH_MESON
	depends on OF && (ARCH_MESON || COMPILE_TEST)
	depends on USB_SUPPORT
	select USB_COMMON
	select GENERIC_PHY
	help
	  Enable this to support the Meson USB2 PHYs found in Meson8b
	  and GXBB SoCs.
	  If unsure, say N.

endmenu
+1 −2
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@@ -18,7 +18,6 @@ obj-$(CONFIG_PHY_PXA_28NM_USB2) += phy-pxa-28nm-usb2.o
obj-$(CONFIG_PHY_PXA_28NM_HSIC)		+= phy-pxa-28nm-hsic.o
obj-$(CONFIG_PHY_MVEBU_SATA)		+= phy-mvebu-sata.o
obj-$(CONFIG_PHY_MIPHY28LP) 		+= phy-miphy28lp.o
obj-$(CONFIG_PHY_MIPHY365X)		+= phy-miphy365x.o
obj-$(CONFIG_PHY_RCAR_GEN2)		+= phy-rcar-gen2.o
obj-$(CONFIG_PHY_RCAR_GEN3_USB2)	+= phy-rcar-gen3-usb2.o
obj-$(CONFIG_OMAP_CONTROL_PHY)		+= phy-omap-control.o
@@ -50,7 +49,6 @@ obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY) += phy-spear1310-miphy.o
obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY)	+= phy-spear1340-miphy.o
obj-$(CONFIG_PHY_XGENE)			+= phy-xgene.o
obj-$(CONFIG_PHY_STIH407_USB)		+= phy-stih407-usb.o
obj-$(CONFIG_PHY_STIH41X_USB)		+= phy-stih41x-usb.o
obj-$(CONFIG_PHY_QCOM_UFS) 	+= phy-qcom-ufs.o
obj-$(CONFIG_PHY_QCOM_UFS) 	+= phy-qcom-ufs-qmp-20nm.o
obj-$(CONFIG_PHY_QCOM_UFS) 	+= phy-qcom-ufs-qmp-14nm.o
@@ -60,3 +58,4 @@ obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
obj-$(CONFIG_PHY_CYGNUS_PCIE)		+= phy-bcm-cygnus-pcie.o
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_PHY_NS2_PCIE)		+= phy-bcm-ns2-pcie.o
obj-$(CONFIG_PHY_MESON8B_USB2)		+= phy-meson8b-usb2.o
+1 −2
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@@ -85,7 +85,6 @@ static int phy_berlin_sata_power_on(struct phy *phy)
	struct phy_berlin_desc *desc = phy_get_drvdata(phy);
	struct phy_berlin_priv *priv = dev_get_drvdata(phy->dev.parent);
	void __iomem *ctrl_reg = priv->base + 0x60 + (desc->index * 0x80);
	int ret = 0;
	u32 regval;

	clk_prepare_enable(priv->clk);
@@ -130,7 +129,7 @@ static int phy_berlin_sata_power_on(struct phy *phy)

	clk_disable_unprepare(priv->clk);

	return ret;
	return 0;
}

static int phy_berlin_sata_power_off(struct phy *phy)
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