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Commit cd3dbe2a authored by Marc Gonzalez's avatar Marc Gonzalez Committed by Andy Gross
Browse files

arm64: dts: qcom: msm8998: Add UFS nodes 



Add host controller and PHY DT nodes.

Tested-by: default avatarLee Jones <lee.jones@linaro.org>
Signed-off-by: default avatarMarc Gonzalez <marc.w.gonzalez@free.fr>
Signed-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: default avatarAndy Gross <andy.gross@linaro.org>
parent 695942de

arch/arm64/boot/dts/qcom/msm8998-mtp.dtsi

+19 −0
Original line number Original line Diff line number Diff line
@@ -270,6 +270,25 @@ 
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;

};

};





&ufshc {

	vcc-supply = <&vreg_l20a_2p95>;

	vccq-supply = <&vreg_l26a_1p2>;

	vccq2-supply = <&vreg_s4a_1p8>;

	vcc-max-microamp = <750000>;

	vccq-max-microamp = <560000>;

	vccq2-max-microamp = <750000>;

};



&ufsphy {

	vdda-phy-supply = <&vreg_l1a_0p875>;

	vdda-pll-supply = <&vreg_l2a_1p2>;

	vddp-ref-clk-supply = <&vreg_l26a_1p2>;

	vdda-phy-max-microamp = <51400>;

	vdda-pll-max-microamp = <14600>;

	vddp-ref-clk-max-microamp = <100>;

	vddp-ref-clk-always-on;

};



&usb3 {

&usb3 {

	status = "okay";

	status = "okay";

};

};

arch/arm64/boot/dts/qcom/msm8998.dtsi

+65 −0
Original line number Original line Diff line number Diff line
@@ -983,6 +983,71 @@ 
			redistributor-stride = <0x0 0x20000>;

			redistributor-stride = <0x0 0x20000>;

			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

		};

		};



		ufshc: ufshc@1da4000 {

			compatible = "qcom,msm8998-ufshc", "qcom,ufshc", "jedec,ufs-2.0";

			reg = <0x01da4000 0x2500>;

			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;

			phys = <&ufsphy_lanes>;

			phy-names = "ufsphy";

			lanes-per-direction = <2>;

			power-domains = <&gcc UFS_GDSC>;



			clock-names =

				"core_clk",

				"bus_aggr_clk",

				"iface_clk",

				"core_clk_unipro",

				"ref_clk",

				"tx_lane0_sync_clk",

				"rx_lane0_sync_clk",

				"rx_lane1_sync_clk";

			clocks =

				<&gcc GCC_UFS_AXI_CLK>,

				<&gcc GCC_AGGRE1_UFS_AXI_CLK>,

				<&gcc GCC_UFS_AHB_CLK>,

				<&gcc GCC_UFS_UNIPRO_CORE_CLK>,

				<&rpmcc RPM_SMD_LN_BB_CLK1>,

				<&gcc GCC_UFS_TX_SYMBOL_0_CLK>,

				<&gcc GCC_UFS_RX_SYMBOL_0_CLK>,

				<&gcc GCC_UFS_RX_SYMBOL_1_CLK>;

			freq-table-hz =

				<50000000 200000000>,

				<0 0>,

				<0 0>,

				<37500000 150000000>,

				<0 0>,

				<0 0>,

				<0 0>,

				<0 0>;



			resets = <&gcc GCC_UFS_BCR>;

			reset-names = "rst";

		};



		ufsphy: phy@1da7000 {

			compatible = "qcom,msm8998-qmp-ufs-phy";

			reg = <0x01da7000 0x18c>;

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			clock-names =

				"ref",

				"ref_aux";

			clocks =

				<&gcc GCC_UFS_CLKREF_CLK>,

				<&gcc GCC_UFS_PHY_AUX_CLK>;



			ufsphy_lanes: lanes@1da7400 {

				reg = <0x01da7400 0x128>,

				      <0x01da7600 0x1fc>,

				      <0x01da7c00 0x1dc>,

				      <0x01da7800 0x128>,

				      <0x01da7a00 0x1fc>;

				#phy-cells = <0>;

			};

		};

	};

	};

};

};