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Commit cd188af5 authored by Len Brown's avatar Len Brown
Browse files

tools/power turbostat: Fix Haswell Core systems



turbostat: cpu0: msr offset 0x630 read failed: Input/output error

because Haswell Core does not have C8-C10.

Output C8-C10 only on Haswell ULT.

Fixes: f5a4c76a ("tools/power turbostat: consolidate duplicate model numbers")

Reported-by: default avatarPrarit Bhargava <prarit@redhat.com>
Suggested-by: default avatarKosuke Tatsukawa <tatsu@ab.jp.nec.com>
Signed-off-by: default avatarLen Brown <len.brown@intel.com>
parent b62b3184
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+6 −4
Original line number Diff line number Diff line
@@ -3217,6 +3217,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
		break;
	case INTEL_FAM6_HASWELL_CORE:	/* HSW */
	case INTEL_FAM6_HASWELL_X:	/* HSX */
	case INTEL_FAM6_HASWELL_ULT:	/* HSW */
	case INTEL_FAM6_HASWELL_GT3E:	/* HSW */
	case INTEL_FAM6_BROADWELL_CORE:	/* BDW */
	case INTEL_FAM6_BROADWELL_GT3E:	/* BDW */
@@ -3413,6 +3414,7 @@ int has_config_tdp(unsigned int family, unsigned int model)
	case INTEL_FAM6_IVYBRIDGE:	/* IVB */
	case INTEL_FAM6_HASWELL_CORE:	/* HSW */
	case INTEL_FAM6_HASWELL_X:	/* HSX */
	case INTEL_FAM6_HASWELL_ULT:	/* HSW */
	case INTEL_FAM6_HASWELL_GT3E:	/* HSW */
	case INTEL_FAM6_BROADWELL_CORE:	/* BDW */
	case INTEL_FAM6_BROADWELL_GT3E:	/* BDW */
@@ -3849,6 +3851,7 @@ void rapl_probe_intel(unsigned int family, unsigned int model)
	case INTEL_FAM6_SANDYBRIDGE:
	case INTEL_FAM6_IVYBRIDGE:
	case INTEL_FAM6_HASWELL_CORE:	/* HSW */
	case INTEL_FAM6_HASWELL_ULT:	/* HSW */
	case INTEL_FAM6_HASWELL_GT3E:	/* HSW */
	case INTEL_FAM6_BROADWELL_CORE:	/* BDW */
	case INTEL_FAM6_BROADWELL_GT3E:	/* BDW */
@@ -4040,6 +4043,7 @@ void perf_limit_reasons_probe(unsigned int family, unsigned int model)

	switch (model) {
	case INTEL_FAM6_HASWELL_CORE:	/* HSW */
	case INTEL_FAM6_HASWELL_ULT:	/* HSW */
	case INTEL_FAM6_HASWELL_GT3E:	/* HSW */
		do_gfx_perf_limit_reasons = 1;
	case INTEL_FAM6_HASWELL_X:	/* HSX */
@@ -4259,6 +4263,7 @@ int has_snb_msrs(unsigned int family, unsigned int model)
	case INTEL_FAM6_IVYBRIDGE_X:	/* IVB Xeon */
	case INTEL_FAM6_HASWELL_CORE:	/* HSW */
	case INTEL_FAM6_HASWELL_X:	/* HSW */
	case INTEL_FAM6_HASWELL_ULT:	/* HSW */
	case INTEL_FAM6_HASWELL_GT3E:	/* HSW */
	case INTEL_FAM6_BROADWELL_CORE:	/* BDW */
	case INTEL_FAM6_BROADWELL_GT3E:	/* BDW */
@@ -4292,7 +4297,7 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
		return 0;

	switch (model) {
	case INTEL_FAM6_HASWELL_CORE:
	case INTEL_FAM6_HASWELL_ULT:	/* HSW */
	case INTEL_FAM6_BROADWELL_CORE:	/* BDW */
	case INTEL_FAM6_SKYLAKE_MOBILE:	/* SKL */
	case INTEL_FAM6_CANNONLAKE_MOBILE:	/* CNL */
@@ -4576,9 +4581,6 @@ unsigned int intel_model_duplicates(unsigned int model)
	case INTEL_FAM6_XEON_PHI_KNM:
		return INTEL_FAM6_XEON_PHI_KNL;

	case INTEL_FAM6_HASWELL_ULT:
		return INTEL_FAM6_HASWELL_CORE;

	case INTEL_FAM6_BROADWELL_X:
	case INTEL_FAM6_BROADWELL_XEON_D:	/* BDX-DE */
		return INTEL_FAM6_BROADWELL_X;