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Commit ccd76ebc authored by Jun Lei's avatar Jun Lei Committed by Alex Deucher
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drm/amd/display: dont set otg offset 



move the update of otg instance outside of hw programming logic,
since this is sw state, it should always be updated and should
never be optimized away.

Signed-off-by: default avatarJun Lei <Jun.Lei@amd.com>
Reviewed-by: default avatarEric Yang <eric.yang2@amd.com>
Acked-by: default avatarBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aa5fdb1a

drivers/gpu/drm/amd/display/dc/core/dc.c

+0 −4
Original line number Diff line number Diff line
@@ -1141,7 +1141,6 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c 
	/* Program all planes within new context*/

	for (i = 0; i < context->stream_count; i++) {

		const struct dc_link *link = context->streams[i]->link;

		struct dc_stream_status *status;



		if (!context->streams[i]->mode_changed)

			continue;
@@ -1166,9 +1165,6 @@ static enum dc_status dc_commit_state_no_check(struct dc *dc, struct dc_state *c 
			}

		}



		status = dc_stream_get_status_from_state(context, context->streams[i]);

		context->streams[i]->out.otg_offset = status->primary_otg_inst;



		CONN_MSG_MODE(link, "{%dx%d, %dx%d@%dKhz}",

				context->streams[i]->timing.h_addressable,

				context->streams[i]->timing.v_addressable,