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Commit cc5d8c56 authored by Naman Padhiar's avatar Naman Padhiar
Browse files

icnss2: Add handler for SMMU faults 



For WCN6750, add SMMU fault handler and perform host triggered
SSR for recovery.

Change-Id: I653b0cd4699dc111e1154476bd1d778d1210f81b
Signed-off-by: default avatarNaman Padhiar <npadhiar@codeaurora.org>
parent a6ec4c9e

drivers/soc/qcom/icnss2/main.c

+30 −0
Original line number Diff line number Diff line
@@ -3530,6 +3530,32 @@ static int icnss_msa_dt_parse(struct icnss_priv *priv) 
	return ret;

}



static int icnss_smmu_fault_handler(struct iommu_domain *domain,

				    struct device *dev, unsigned long iova,

				    int flags, void *handler_token)

{

	struct icnss_priv *priv = handler_token;

	struct icnss_uevent_fw_down_data fw_down_data = {0};



	icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);



	if (!priv) {

		icnss_pr_err("priv is NULL\n");

		return -ENODEV;

	}



	if (test_bit(ICNSS_FW_READY, &priv->state)) {

		fw_down_data.crashed = true;

		icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,

					 &fw_down_data);

	}



	icnss_trigger_recovery(&priv->pdev->dev);



	/* IOMMU driver requires non-zero return value to print debug info. */

	return -EINVAL;

}



static int icnss_smmu_dt_parse(struct icnss_priv *priv)

{

	int ret = 0;
@@ -3561,6 +3587,10 @@ static int icnss_smmu_dt_parse(struct icnss_priv *priv) 
		if (!ret && !strcmp("fastmap", iommu_dma_type)) {

			icnss_pr_dbg("SMMU S1 stage enabled\n");

			priv->smmu_s1_enable = true;

			if (priv->device_id == WCN6750_DEVICE_ID)

				iommu_set_fault_handler(priv->iommu_domain,

						icnss_smmu_fault_handler,

						priv);

		}



		res = platform_get_resource_byname(pdev,