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Commit cc190ff2 authored by Sai Prakash Ranjan's avatar Sai Prakash Ranjan Committed by Lee Jones
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UPSTREAM: drm/meson: Fix overflow implicit truncation warnings 



[ Upstream commit 98692f52c588225034cbff458622c2c06dfcb544 ]

Fix -Woverflow warnings for drm/meson driver which is a result
of moving arm64 custom MMIO accessor macros to asm-generic function
implementations giving a bonus type-checking now and uncovering these
overflow warnings.

drivers/gpu/drm/meson/meson_viu.c: In function ‘meson_viu_init’:
drivers/gpu/drm/meson/meson_registers.h:1826:48: error: large integer implicitly truncated to unsigned type [-Werror=overflow]
 #define  VIU_OSD_BLEND_REORDER(dest, src)      ((src) << (dest * 4))
                                                ^
drivers/gpu/drm/meson/meson_viu.c:472:18: note: in expansion of macro ‘VIU_OSD_BLEND_REORDER’
   writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) |
                  ^~~~~~~~~~~~~~~~~~~~~

Reported-by: default avatarkernel test robot <lkp@intel.com>
Signed-off-by: default avatarSai Prakash Ranjan <quic_saipraka@quicinc.com>
Reviewed-by: default avatarArnd Bergmann <arnd@arndb.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
Fixes: 147ae1cb ("drm: meson: viu: use proper macros instead of magic constants")
Signed-off-by: default avatarLee Jones <joneslee@google.com>
Change-Id: Id3502967ec9df74ea9420a34549bc0ac3c49dfa8
Signed-off-by: default avatarLee Jones <joneslee@google.com>
parent 0d0c1b26

drivers/gpu/drm/meson/meson_viu.c

+11 −11
Original line number Diff line number Diff line
@@ -400,17 +400,17 @@ void meson_viu_init(struct meson_drm *priv) 
			priv->io_base + _REG(VD2_IF0_LUMA_FIFO_SIZE));



	if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {

		writel_relaxed(VIU_OSD_BLEND_REORDER(0, 1) |

			       VIU_OSD_BLEND_REORDER(1, 0) |

			       VIU_OSD_BLEND_REORDER(2, 0) |

			       VIU_OSD_BLEND_REORDER(3, 0) |

			       VIU_OSD_BLEND_DIN_EN(1) |

			       VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 |

			       VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 |

			       VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 |

			       VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) |

			       VIU_OSD_BLEND_HOLD_LINES(4),

			       priv->io_base + _REG(VIU_OSD_BLEND_CTRL));

		u32 val = (u32)VIU_OSD_BLEND_REORDER(0, 1) |

			  (u32)VIU_OSD_BLEND_REORDER(1, 0) |

			  (u32)VIU_OSD_BLEND_REORDER(2, 0) |

			  (u32)VIU_OSD_BLEND_REORDER(3, 0) |

			  (u32)VIU_OSD_BLEND_DIN_EN(1) |

			  (u32)VIU_OSD_BLEND1_DIN3_BYPASS_TO_DOUT1 |

			  (u32)VIU_OSD_BLEND1_DOUT_BYPASS_TO_BLEND2 |

			  (u32)VIU_OSD_BLEND_DIN0_BYPASS_TO_DOUT0 |

			  (u32)VIU_OSD_BLEND_BLEN2_PREMULT_EN(1) |

			  (u32)VIU_OSD_BLEND_HOLD_LINES(4);

		writel_relaxed(val, priv->io_base + _REG(VIU_OSD_BLEND_CTRL));



		writel_relaxed(OSD_BLEND_PATH_SEL_ENABLE,

			       priv->io_base + _REG(OSD1_BLEND_SRC_CTRL));