Loading qcom/shima.dtsi +135 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,8 @@ #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> / { model = "Qualcomm Technologies, Inc. Shima"; compatible = "qcom,shima"; Loading Loading @@ -1126,6 +1128,139 @@ qcom,pipe-attr-ee; }; pil_modem: qcom,mss@4080000 { compatible = "qcom,pil-tz-generic"; reg = <0x4080000 0x100>; vdd_cx-supply = <&VDD_CX_LEVEL>; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; vdd_mss-supply = <&VDD_MODEM_LEVEL>; qcom,vdd_mss-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; qcom,proxy-reg-names = "vdd_cx", "vdd_mss"; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <4>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <421>; qcom,sysmon-id = <0>; qcom,ssctl-instance-id = <0x12>; qcom,firmware-name = "modem"; memory-region = <&pil_mpss_wlan_mem>; qcom,complete-ramdump; /* Inputs from mss */ interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, <&modem_smp2p_in 0 0>, <&modem_smp2p_in 2 0>, <&modem_smp2p_in 1 0>, <&modem_smp2p_in 3 0>, <&modem_smp2p_in 7 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", "qcom,stop-ack", "qcom,shutdown-ack"; /* Outputs to mss */ qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "qcom,force-stop"; mboxes = <&qmp_aop 0>; mbox-names = "mss-pil"; }; qcom,lpass@3700000 { compatible = "qcom,pil-tz-generic"; reg = <0x3700000 0x00100>; vdd_cx-supply = <&VDD_LPI_CX_LEVEL>; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>; vdd_mx-supply = <&VDD_LPI_MX_LEVEL>; qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>; qcom,proxy-reg-names = "vdd_cx","vdd_mx"; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <1>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <423>; qcom,sysmon-id = <1>; qcom,ssctl-instance-id = <0x14>; qcom,firmware-name = "adsp"; memory-region = <&pil_adsp_mem>; qcom,complete-ramdump; /* Inputs from lpass */ interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, <&adsp_smp2p_in 0 0>, <&adsp_smp2p_in 2 0>, <&adsp_smp2p_in 1 0>, <&adsp_smp2p_in 3 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", "qcom,stop-ack"; /* Outputs to lpass */ qcom,smem-states = <&adsp_smp2p_out 0>; qcom,smem-state-names = "qcom,force-stop"; mboxes = <&qmp_aop 0>; mbox-names = "adsp-pil"; }; qcom,turing@a300000 { compatible = "qcom,pil-tz-generic"; reg = <0xa300000 0x100000>; vdd_cx-supply = <&VDD_CX_LEVEL>; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; vdd_mx-supply = <&VDD_MXC_LEVEL>; qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; qcom,proxy-reg-names = "vdd_cx","vdd_mx"; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <18>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <601>; qcom,sysmon-id = <7>; qcom,ssctl-instance-id = <0x17>; qcom,firmware-name = "cdsp"; memory-region = <&pil_cdsp_mem>; qcom,complete-ramdump; /* Inputs from turing */ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, <&cdsp_smp2p_in 0 0>, <&cdsp_smp2p_in 2 0>, <&cdsp_smp2p_in 1 0>, <&cdsp_smp2p_in 3 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", "qcom,stop-ack"; /* Outputs to turing */ qcom,smem-states = <&cdsp_smp2p_out 0>; qcom,smem-state-names = "qcom,force-stop"; mboxes = <&qmp_aop 0>; mbox-names = "cdsp-pil"; }; }; #include "shima-pinctrl.dtsi" Loading Loading
qcom/shima.dtsi +135 −0 Original line number Diff line number Diff line Loading @@ -11,6 +11,8 @@ #include <dt-bindings/soc/qcom,ipcc.h> #include <dt-bindings/soc/qcom,rpmh-rsc.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h> / { model = "Qualcomm Technologies, Inc. Shima"; compatible = "qcom,shima"; Loading Loading @@ -1126,6 +1128,139 @@ qcom,pipe-attr-ee; }; pil_modem: qcom,mss@4080000 { compatible = "qcom,pil-tz-generic"; reg = <0x4080000 0x100>; vdd_cx-supply = <&VDD_CX_LEVEL>; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; vdd_mss-supply = <&VDD_MODEM_LEVEL>; qcom,vdd_mss-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; qcom,proxy-reg-names = "vdd_cx", "vdd_mss"; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <4>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <421>; qcom,sysmon-id = <0>; qcom,ssctl-instance-id = <0x12>; qcom,firmware-name = "modem"; memory-region = <&pil_mpss_wlan_mem>; qcom,complete-ramdump; /* Inputs from mss */ interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>, <&modem_smp2p_in 0 0>, <&modem_smp2p_in 2 0>, <&modem_smp2p_in 1 0>, <&modem_smp2p_in 3 0>, <&modem_smp2p_in 7 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", "qcom,stop-ack", "qcom,shutdown-ack"; /* Outputs to mss */ qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "qcom,force-stop"; mboxes = <&qmp_aop 0>; mbox-names = "mss-pil"; }; qcom,lpass@3700000 { compatible = "qcom,pil-tz-generic"; reg = <0x3700000 0x00100>; vdd_cx-supply = <&VDD_LPI_CX_LEVEL>; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>; vdd_mx-supply = <&VDD_LPI_MX_LEVEL>; qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>; qcom,proxy-reg-names = "vdd_cx","vdd_mx"; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <1>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <423>; qcom,sysmon-id = <1>; qcom,ssctl-instance-id = <0x14>; qcom,firmware-name = "adsp"; memory-region = <&pil_adsp_mem>; qcom,complete-ramdump; /* Inputs from lpass */ interrupts-extended = <&pdc 6 IRQ_TYPE_LEVEL_HIGH>, <&adsp_smp2p_in 0 0>, <&adsp_smp2p_in 2 0>, <&adsp_smp2p_in 1 0>, <&adsp_smp2p_in 3 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", "qcom,stop-ack"; /* Outputs to lpass */ qcom,smem-states = <&adsp_smp2p_out 0>; qcom,smem-state-names = "qcom,force-stop"; mboxes = <&qmp_aop 0>; mbox-names = "adsp-pil"; }; qcom,turing@a300000 { compatible = "qcom,pil-tz-generic"; reg = <0xa300000 0x100000>; vdd_cx-supply = <&VDD_CX_LEVEL>; qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; vdd_mx-supply = <&VDD_MXC_LEVEL>; qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; qcom,proxy-reg-names = "vdd_cx","vdd_mx"; clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; qcom,proxy-clock-names = "xo"; qcom,pas-id = <18>; qcom,proxy-timeout-ms = <10000>; qcom,smem-id = <601>; qcom,sysmon-id = <7>; qcom,ssctl-instance-id = <0x17>; qcom,firmware-name = "cdsp"; memory-region = <&pil_cdsp_mem>; qcom,complete-ramdump; /* Inputs from turing */ interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>, <&cdsp_smp2p_in 0 0>, <&cdsp_smp2p_in 2 0>, <&cdsp_smp2p_in 1 0>, <&cdsp_smp2p_in 3 0>; interrupt-names = "qcom,wdog", "qcom,err-fatal", "qcom,proxy-unvote", "qcom,err-ready", "qcom,stop-ack"; /* Outputs to turing */ qcom,smem-states = <&cdsp_smp2p_out 0>; qcom,smem-state-names = "qcom,force-stop"; mboxes = <&qmp_aop 0>; mbox-names = "cdsp-pil"; }; }; #include "shima-pinctrl.dtsi" Loading