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Commit cbf74cea authored by Robert Richter's avatar Robert Richter
Browse files

oprofile, x86: Add comments to IBS LVT offset initialization 



Adding a comment in the code as IBS LVT setup is not obvious at all ...

Signed-off-by: default avatarRobert Richter <robert.richter@amd.com>
parent b76a06e0

arch/x86/kernel/apic/apic.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -390,7 +390,8 @@ static unsigned int reserve_eilvt_offset(int offset, unsigned int new) 




/*

/*

 * If mask=1, the LVT entry does not generate interrupts while mask=0

 * If mask=1, the LVT entry does not generate interrupts while mask=0

 * enables the vector. See also the BKDGs.

 * enables the vector. See also the BKDGs. Must be called with

 * preemption disabled.

 */

 */





int setup_APIC_eilvt(u8 offset, u8 vector, u8 msg_type, u8 mask)

int setup_APIC_eilvt(u8 offset, u8 vector, u8 msg_type, u8 mask)

arch/x86/oprofile/op_model_amd.c

+9 −4
Original line number Original line Diff line number Diff line
@@ -609,16 +609,21 @@ static int setup_ibs_ctl(int ibs_eilvt_off) 
	return 0;

	return 0;

}

}





/*

 * This runs only on the current cpu. We try to find an LVT offset and

 * setup the local APIC. For this we must disable preemption. On

 * success we initialize all nodes with this offset. This updates then

 * the offset in the IBS_CTL per-node msr. The per-core APIC setup of

 * the IBS interrupt vector is called from op_amd_setup_ctrs()/op_-

 * amd_cpu_shutdown() using the new offset.

 */

static int force_ibs_eilvt_setup(void)

static int force_ibs_eilvt_setup(void)

{

{

	int offset;

	int offset;

	int ret;

	int ret;





	/*

	 * find the next free available EILVT entry, skip offset 0,

	 * pin search to this cpu

	 */

	preempt_disable();

	preempt_disable();

	/* find the next free available EILVT entry, skip offset 0 */

	for (offset = 1; offset < APIC_EILVT_NR_MAX; offset++) {

	for (offset = 1; offset < APIC_EILVT_NR_MAX; offset++) {

		if (get_eilvt(offset))

		if (get_eilvt(offset))

			break;

			break;