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Commit caef8a71 authored by Eli Cohen's avatar Eli Cohen Committed by Greg Kroah-Hartman
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net/mlx5e: Fix hairpin RSS table size 



[ Upstream commit 6412bb396a63f28de994b1480edf8e4caf4aa494 ]

Set hairpin table size to the corret size, based on the groups that
would be created in it. Groups are laid out on the table such that a
group occupies a range of entries in the table. This implies that the
group ranges should have correspondence to the table they are laid upon.

The patch cited below  made group 1's size to grow hence causing
overflow of group range laid on the table.

Fixes: a795d8db ("net/mlx5e: Support RSS for IP-in-IP and IPv6 tunneled packets")
Signed-off-by: default avatarEli Cohen <eli@mellanox.com>
Signed-off-by: default avatarMark Bloch <markb@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent c48a78c0

drivers/net/ethernet/mellanox/mlx5/core/en/fs.h

+16 −0
Original line number Diff line number Diff line
@@ -122,6 +122,22 @@ enum { 
#endif

};



#define MLX5E_TTC_NUM_GROUPS	3

#define MLX5E_TTC_GROUP1_SIZE	(BIT(3) + MLX5E_NUM_TUNNEL_TT)

#define MLX5E_TTC_GROUP2_SIZE	 BIT(1)

#define MLX5E_TTC_GROUP3_SIZE	 BIT(0)

#define MLX5E_TTC_TABLE_SIZE	(MLX5E_TTC_GROUP1_SIZE +\

				 MLX5E_TTC_GROUP2_SIZE +\

				 MLX5E_TTC_GROUP3_SIZE)



#define MLX5E_INNER_TTC_NUM_GROUPS	3

#define MLX5E_INNER_TTC_GROUP1_SIZE	BIT(3)

#define MLX5E_INNER_TTC_GROUP2_SIZE	BIT(1)

#define MLX5E_INNER_TTC_GROUP3_SIZE	BIT(0)

#define MLX5E_INNER_TTC_TABLE_SIZE	(MLX5E_INNER_TTC_GROUP1_SIZE +\

					 MLX5E_INNER_TTC_GROUP2_SIZE +\

					 MLX5E_INNER_TTC_GROUP3_SIZE)



#ifdef CONFIG_MLX5_EN_RXNFC



struct mlx5e_ethtool_table {

drivers/net/ethernet/mellanox/mlx5/core/en_fs.c

+0 −16
Original line number Diff line number Diff line
@@ -904,22 +904,6 @@ static int mlx5e_generate_ttc_table_rules(struct mlx5e_priv *priv, 
	return err;

}



#define MLX5E_TTC_NUM_GROUPS	3

#define MLX5E_TTC_GROUP1_SIZE	(BIT(3) + MLX5E_NUM_TUNNEL_TT)

#define MLX5E_TTC_GROUP2_SIZE	 BIT(1)

#define MLX5E_TTC_GROUP3_SIZE	 BIT(0)

#define MLX5E_TTC_TABLE_SIZE	(MLX5E_TTC_GROUP1_SIZE +\

				 MLX5E_TTC_GROUP2_SIZE +\

				 MLX5E_TTC_GROUP3_SIZE)



#define MLX5E_INNER_TTC_NUM_GROUPS	3

#define MLX5E_INNER_TTC_GROUP1_SIZE	BIT(3)

#define MLX5E_INNER_TTC_GROUP2_SIZE	BIT(1)

#define MLX5E_INNER_TTC_GROUP3_SIZE	BIT(0)

#define MLX5E_INNER_TTC_TABLE_SIZE	(MLX5E_INNER_TTC_GROUP1_SIZE +\

					 MLX5E_INNER_TTC_GROUP2_SIZE +\

					 MLX5E_INNER_TTC_GROUP3_SIZE)



static int mlx5e_create_ttc_table_groups(struct mlx5e_ttc_table *ttc,

					 bool use_ipv)

{

drivers/net/ethernet/mellanox/mlx5/core/en_tc.c

+1 −1
Original line number Diff line number Diff line
@@ -586,7 +586,7 @@ static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp, 
	for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)

		ttc_params->indir_tirn[tt] = hp->indir_tirn[tt];



	ft_attr->max_fte = MLX5E_NUM_TT;

	ft_attr->max_fte = MLX5E_TTC_TABLE_SIZE;

	ft_attr->level = MLX5E_TC_TTC_FT_LEVEL;

	ft_attr->prio = MLX5E_TC_PRIO;

}