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Commit caaa8be3 authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Ingo Molnar
Browse files

perf, x86: Fix __initconst vs const 



All variables that have __initconst should also be const.

Suggested-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
LKML-Reference: <new-submission>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent b4cdc5c2

arch/x86/kernel/cpu/perf_event_amd.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -2,7 +2,7 @@ 




static DEFINE_RAW_SPINLOCK(amd_nb_lock);

static DEFINE_RAW_SPINLOCK(amd_nb_lock);





static __initconst u64 amd_hw_cache_event_ids

static __initconst const u64 amd_hw_cache_event_ids

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -368,7 +368,7 @@ static void amd_pmu_cpu_dead(int cpu) 
	raw_spin_unlock(&amd_nb_lock);

	raw_spin_unlock(&amd_nb_lock);

}

}





static __initconst struct x86_pmu amd_pmu = {

static __initconst const struct x86_pmu amd_pmu = {

	.name			= "AMD",

	.name			= "AMD",

	.handle_irq		= x86_pmu_handle_irq,

	.handle_irq		= x86_pmu_handle_irq,

	.disable_all		= x86_pmu_disable_all,

	.disable_all		= x86_pmu_disable_all,

arch/x86/kernel/cpu/perf_event_intel.c

+6 −6
Original line number Original line Diff line number Diff line
@@ -88,7 +88,7 @@ static u64 intel_pmu_event_map(int hw_event) 
	return intel_perfmon_event_map[hw_event];

	return intel_perfmon_event_map[hw_event];

}

}





static __initconst u64 westmere_hw_cache_event_ids

static __initconst const u64 westmere_hw_cache_event_ids

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -179,7 +179,7 @@ static __initconst u64 westmere_hw_cache_event_ids 
 },

 },

};

};





static __initconst u64 nehalem_hw_cache_event_ids

static __initconst const u64 nehalem_hw_cache_event_ids

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -270,7 +270,7 @@ static __initconst u64 nehalem_hw_cache_event_ids 
 },

 },

};

};





static __initconst u64 core2_hw_cache_event_ids

static __initconst const u64 core2_hw_cache_event_ids

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -361,7 +361,7 @@ static __initconst u64 core2_hw_cache_event_ids 
 },

 },

};

};





static __initconst u64 atom_hw_cache_event_ids

static __initconst const u64 atom_hw_cache_event_ids

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -782,7 +782,7 @@ static int intel_pmu_hw_config(struct perf_event *event) 
	return 0;

	return 0;

}

}





static __initconst struct x86_pmu core_pmu = {

static __initconst const struct x86_pmu core_pmu = {

	.name			= "core",

	.name			= "core",

	.handle_irq		= x86_pmu_handle_irq,

	.handle_irq		= x86_pmu_handle_irq,

	.disable_all		= x86_pmu_disable_all,

	.disable_all		= x86_pmu_disable_all,
@@ -820,7 +820,7 @@ static void intel_pmu_cpu_dying(int cpu) 
	fini_debug_store_on_cpu(cpu);

	fini_debug_store_on_cpu(cpu);

}

}





static __initconst struct x86_pmu intel_pmu = {

static __initconst const struct x86_pmu intel_pmu = {

	.name			= "Intel",

	.name			= "Intel",

	.handle_irq		= intel_pmu_handle_irq,

	.handle_irq		= intel_pmu_handle_irq,

	.disable_all		= intel_pmu_disable_all,

	.disable_all		= intel_pmu_disable_all,

arch/x86/kernel/cpu/perf_event_p4.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -287,7 +287,7 @@ static struct p4_event_bind p4_event_bind_map[] = { 
	p4_config_pack_cccr(cache_event					| \

	p4_config_pack_cccr(cache_event					| \

			    P4_CCCR_ESEL(P4_OPCODE_ESEL(P4_OPCODE(event))))

			    P4_CCCR_ESEL(P4_OPCODE_ESEL(P4_OPCODE(event))))





static __initconst u64 p4_hw_cache_event_ids

static __initconst const u64 p4_hw_cache_event_ids

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_OP_MAX]

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =

				[PERF_COUNT_HW_CACHE_RESULT_MAX] =
@@ -780,7 +780,7 @@ static int p4_pmu_schedule_events(struct cpu_hw_events *cpuc, int n, int *assign 
	return num ? -ENOSPC : 0;

	return num ? -ENOSPC : 0;

}

}





static __initconst struct x86_pmu p4_pmu = {

static __initconst const struct x86_pmu p4_pmu = {

	.name			= "Netburst P4/Xeon",

	.name			= "Netburst P4/Xeon",

	.handle_irq		= p4_pmu_handle_irq,

	.handle_irq		= p4_pmu_handle_irq,

	.disable_all		= p4_pmu_disable_all,

	.disable_all		= p4_pmu_disable_all,

arch/x86/kernel/cpu/perf_event_p6.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -84,7 +84,7 @@ static void p6_pmu_enable_event(struct perf_event *event) 
	(void)checking_wrmsrl(hwc->config_base + hwc->idx, val);

	(void)checking_wrmsrl(hwc->config_base + hwc->idx, val);

}

}





static __initconst struct x86_pmu p6_pmu = {

static __initconst const struct x86_pmu p6_pmu = {

	.name			= "p6",

	.name			= "p6",

	.handle_irq		= x86_pmu_handle_irq,

	.handle_irq		= x86_pmu_handle_irq,

	.disable_all		= p6_pmu_disable_all,

	.disable_all		= p6_pmu_disable_all,