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Commit ca9503fc authored by Mark Brown's avatar Mark Brown Committed by Catalin Marinas
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arm64: Expose FRINT capabilities to userspace 



ARMv8.5 introduces the FRINT series of instructions for rounding floating
point numbers to integers. Provide a capability to userspace in order to
allow applications to determine if the system supports these instructions.

Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Acked-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 12019374

Documentation/arm64/elf_hwcaps.txt

+4 −0
Original line number Diff line number Diff line
@@ -227,6 +227,10 @@ HWCAP_PACG 
    ID_AA64ISAR1_EL1.GPI == 0b0001, as described by

    Documentation/arm64/pointer-authentication.txt.



HWCAP2_FRINT



    Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.





4. Unused AT_HWCAP bits

-----------------------

arch/arm64/include/asm/hwcap.h

+1 −0
Original line number Diff line number Diff line
@@ -96,6 +96,7 @@ 
#define KERNEL_HWCAP_SVESHA3		__khwcap2_feature(SVESHA3)

#define KERNEL_HWCAP_SVESM4		__khwcap2_feature(SVESM4)

#define KERNEL_HWCAP_FLAGM2		__khwcap2_feature(FLAGM2)

#define KERNEL_HWCAP_FRINT		__khwcap2_feature(FRINT)



/*

 * This yields a mask that user programs can use to figure out what

arch/arm64/include/asm/sysreg.h

+1 −0
Original line number Diff line number Diff line
@@ -560,6 +560,7 @@ 


/* id_aa64isar1 */

#define ID_AA64ISAR1_SB_SHIFT		36

#define ID_AA64ISAR1_FRINTTS_SHIFT	32

#define ID_AA64ISAR1_GPI_SHIFT		28

#define ID_AA64ISAR1_GPA_SHIFT		24

#define ID_AA64ISAR1_LRCPC_SHIFT	20

arch/arm64/include/uapi/asm/hwcap.h

+1 −0
Original line number Diff line number Diff line
@@ -64,5 +64,6 @@ 
#define HWCAP2_SVESHA3		(1 << 5)

#define HWCAP2_SVESM4		(1 << 6)

#define HWCAP2_FLAGM2		(1 << 7)

#define HWCAP2_FRINT		(1 << 8)



#endif /* _UAPI__ASM_HWCAP_H */

arch/arm64/kernel/cpufeature.c

+1 −0
Original line number Diff line number Diff line
@@ -1640,6 +1640,7 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { 
	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FCMA_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FCMA),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_LRCPC),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_LRCPC_SHIFT, FTR_UNSIGNED, 2, CAP_HWCAP, KERNEL_HWCAP_ILRCPC),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_FRINTTS_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_FRINT),

	HWCAP_CAP(SYS_ID_AA64ISAR1_EL1, ID_AA64ISAR1_SB_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_SB),

	HWCAP_CAP(SYS_ID_AA64MMFR2_EL1, ID_AA64MMFR2_AT_SHIFT, FTR_UNSIGNED, 1, CAP_HWCAP, KERNEL_HWCAP_USCAT),

#ifdef CONFIG_ARM64_SVE