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Commit ca42d8d8 authored by Maciej Purski's avatar Maciej Purski Committed by Krzysztof Kozlowski
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ARM: dts: exynos: Add soc node to exynos5440 



The exynos5440 device tree is the only one left, which does not use
"soc" node. Add a "soc" node to exynos5440.dtsi in order to make it
consistent with other exynos DTS.

Signed-off-by: default avatarMaciej Purski <m.purski@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 9097b4bd

arch/arm/boot/dts/exynos5440.dtsi

+261 −253
Original line number Diff line number Diff line
@@ -26,24 +26,6 @@ 
		tmuctrl2 = &tmuctrl_2;

	};



	clock: clock-controller@160000 {

		compatible = "samsung,exynos5440-clock";

		reg = <0x160000 0x1000>;

		#clock-cells = <1>;

	};



	gic: interrupt-controller@2e0000 {

		compatible = "arm,cortex-a15-gic";

		#interrupt-cells = <3>;

		interrupt-controller;

		reg =	<0x2E1000 0x1000>,

			<0x2E2000 0x2000>,

			<0x2E4000 0x2000>,

			<0x2E6000 0x2000>;

		interrupts = <GIC_PPI 9

				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;
@@ -70,6 +52,31 @@ 
		};

	};



	soc: soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		clock: clock-controller@160000 {

			compatible = "samsung,exynos5440-clock";

			reg = <0x160000 0x1000>;

			#clock-cells = <1>;

		};



		gic: interrupt-controller@2e0000 {

			compatible = "arm,cortex-a15-gic";

			#interrupt-cells = <3>;

			interrupt-controller;

			reg =	<0x2E1000 0x1000>,

				<0x2E2000 0x2000>,

				<0x2E4000 0x2000>,

				<0x2E6000 0x2000>;

			interrupts = <GIC_PPI 9

					(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;

		};





		arm-pmu {

			compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu";

			interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
@@ -248,21 +255,6 @@ 
			#include "exynos5440-tmu-sensor-conf.dtsi"

		};



	thermal-zones {

		cpu0_thermal: cpu0-thermal {

			thermal-sensors = <&tmuctrl_0>;

			#include "exynos5440-trip-points.dtsi"

		};

		cpu1_thermal: cpu1-thermal {

		       thermal-sensors = <&tmuctrl_1>;

		       #include "exynos5440-trip-points.dtsi"

		};

		cpu2_thermal: cpu2-thermal {

		       thermal-sensors = <&tmuctrl_2>;

		       #include "exynos5440-trip-points.dtsi"

		};

	};



		sata@210000 {

			compatible = "snps,exynos5440-ahci";

			reg = <0x210000 0x10000>;
@@ -345,3 +337,19 @@ 
			status = "disabled";

		};

	};



	thermal-zones {

		cpu0_thermal: cpu0-thermal {

			thermal-sensors = <&tmuctrl_0>;

			#include "exynos5440-trip-points.dtsi"

		};

		cpu1_thermal: cpu1-thermal {

		       thermal-sensors = <&tmuctrl_1>;

		       #include "exynos5440-trip-points.dtsi"

		};

		cpu2_thermal: cpu2-thermal {

		       thermal-sensors = <&tmuctrl_2>;

		       #include "exynos5440-trip-points.dtsi"

		};

	};

};