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Commit ca287bde authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add DCC register list for sdxlemur"

parents b2ca49eb 7cf6499e

qcom/sdxlemur.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -199,6 +199,15 @@ 


		reg-names = "dcc-base", "dcc-ram-base";

		dcc-ram-offset = <0x12000>;



		link_list1 {

			qcom,curr-link-list = <2>;

			qcom,data-sink = "sram";

			qcom,link-list = <DCC_READ 0xb204520 1 0>,

				<DCC_READ 0xb201020 1 0>,

				<DCC_READ 0xb201024 1 0>,

				<DCC_READ 0xb204524 1 0>;

		};

	};



	wdog: qcom,wdt@17817000 {