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Commit c9d29d62 authored by Ezequiel Garcia's avatar Ezequiel Garcia Committed by Greg Kroah-Hartman
Browse files

ARM: dts: rockchip: Fix the timer clocks order



[ Upstream commit 7b46d674ac000b101fdad92cf16cc11d90b72f86 ]

Fixed order is the device-tree convention.
The timer driver currently gets clocks by name,
so no changes are needed there.

Signed-off-by: default avatarEzequiel Garcia <ezequiel@collabora.com>
Link: https://lore.kernel.org/r/20210506111136.3941-3-ezequiel@collabora.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent d105e15d
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+4 −4
Original line number Diff line number Diff line
@@ -150,16 +150,16 @@
		compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
		reg = <0x2000e000 0x20>;
		interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>;
		clock-names = "timer", "pclk";
		clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>;
		clock-names = "pclk", "timer";
	};

	timer6: timer@200380a0 {
		compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
		reg = <0x200380a0 0x20>;
		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>;
		clock-names = "timer", "pclk";
		clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>;
		clock-names = "pclk", "timer";
	};

	i2s0: i2s@1011a000 {
+2 −2
Original line number Diff line number Diff line
@@ -238,8 +238,8 @@
		compatible = "rockchip,rk3288-timer";
		reg = <0x0 0xff810000 0x0 0x20>;
		interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&xin24m>, <&cru PCLK_TIMER>;
		clock-names = "timer", "pclk";
		clocks = <&cru PCLK_TIMER>, <&xin24m>;
		clock-names = "pclk", "timer";
	};

	display-subsystem {