Loading bindings/clock/qcom,cmn-blk-pll.txt 0 → 100644 +26 −0 Original line number Diff line number Diff line Qualcomm Technologies, Inc. Common Block PLL Controller Binding --------------------------------------------------------------- Required properties : - compatible : shall contain only the following: "qcom,cmn_blk_pll" - reg : shall contain base register location and size. - reg-names : "cmn_blk". - clock-names : Shall contain "misc_reset", "ahb_clk", "aon_clk". - clocks : phandle + clock reference to misc_reset, ahb and aon clock. - #clock-cells : shall contain 1. Example : clock_cmn_blk_pll@2f780 { compatible = "qcom,cmn_blk_pll"; reg = <0x2f780 0x4>; reg-names = "cmn_blk"; clocks = <&clock_gcc GCC_BIAS_PLL_MISC_RESET_CLK>, <&clock_gcc GCC_BIAS_PLL_AHB_CLK>, <&clock_gcc GCC_BIAS_PLL_AON_CLK>; clock-names = "misc_reset_clk", "ahb_clk", "aon_clk"; resets = <&clock_gcc GCC_BIAS_PLL_BCR>; reset-names = "cmn_blk_pll_reset"; #clock-cells = <1>; }; bindings/clock/qcom,debugcc.txt +1 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ Required properties : "qcom,direwolf-debugcc" "qcom,blair-debugcc" "qcom,scuba-debugcc" "qcom,qcs404-debugcc" - qcom,gcc: phandle to the GCC device node. - qcom,videocc: phandle to the Video CC device node. Loading bindings/clock/qcom,gcc.txt +1 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ Required properties : "qcom,direwolf-gcc" "qcom,blair-gcc" "qcom,scuba-gcc" "qcom,qcs404-gcc-mdss" - reg : shall contain base register location and length - vdd_cx-supply: The vdd_cx logic rail supply. Loading Loading
bindings/clock/qcom,cmn-blk-pll.txt 0 → 100644 +26 −0 Original line number Diff line number Diff line Qualcomm Technologies, Inc. Common Block PLL Controller Binding --------------------------------------------------------------- Required properties : - compatible : shall contain only the following: "qcom,cmn_blk_pll" - reg : shall contain base register location and size. - reg-names : "cmn_blk". - clock-names : Shall contain "misc_reset", "ahb_clk", "aon_clk". - clocks : phandle + clock reference to misc_reset, ahb and aon clock. - #clock-cells : shall contain 1. Example : clock_cmn_blk_pll@2f780 { compatible = "qcom,cmn_blk_pll"; reg = <0x2f780 0x4>; reg-names = "cmn_blk"; clocks = <&clock_gcc GCC_BIAS_PLL_MISC_RESET_CLK>, <&clock_gcc GCC_BIAS_PLL_AHB_CLK>, <&clock_gcc GCC_BIAS_PLL_AON_CLK>; clock-names = "misc_reset_clk", "ahb_clk", "aon_clk"; resets = <&clock_gcc GCC_BIAS_PLL_BCR>; reset-names = "cmn_blk_pll_reset"; #clock-cells = <1>; };
bindings/clock/qcom,debugcc.txt +1 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ Required properties : "qcom,direwolf-debugcc" "qcom,blair-debugcc" "qcom,scuba-debugcc" "qcom,qcs404-debugcc" - qcom,gcc: phandle to the GCC device node. - qcom,videocc: phandle to the Video CC device node. Loading
bindings/clock/qcom,gcc.txt +1 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,7 @@ Required properties : "qcom,direwolf-gcc" "qcom,blair-gcc" "qcom,scuba-gcc" "qcom,qcs404-gcc-mdss" - reg : shall contain base register location and length - vdd_cx-supply: The vdd_cx logic rail supply. Loading