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Commit c7d36f9f authored by Felix Fietkau's avatar Felix Fietkau Committed by John W. Linville
Browse files

ath9k_hw: clean up iniModesAdditional



use iniModesFastClock for 5 ghz fast clock specific settings, and
iniAdditional for clock/chip specific initval overrides

Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 9951c4d0
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+2 −3
Original line number Diff line number Diff line
@@ -869,10 +869,9 @@ static int ar5008_hw_process_ini(struct ath_hw *ah,

	REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites);

	if (IS_CHAN_A_FAST_CLOCK(ah, chan)) {
		REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex,
	if (IS_CHAN_A_FAST_CLOCK(ah, chan))
		REG_WRITE_ARRAY(&ah->iniModesFastClock, modesIndex,
				regWrites);
	}

	ar5008_hw_override_ini(ah, chan);
	ar5008_hw_set_channel_regs(ah, chan);
+1 −1
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
		INIT_INI_ARRAY(&ah->iniCommon, ar9280Common_9280_2,
			       ARRAY_SIZE(ar9280Common_9280_2), 2);

		INIT_INI_ARRAY(&ah->iniModesAdditional,
		INIT_INI_ARRAY(&ah->iniModesFastClock,
			       ar9280Modes_fast_clock_9280_2,
			       ARRAY_SIZE(ar9280Modes_fast_clock_9280_2), 3);
	} else if (AR_SREV_9160_10_OR_LATER(ah)) {
+13 −12
Original line number Diff line number Diff line
@@ -87,11 +87,11 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)

		/* additional clock settings */
		if (ah->is_clk_25mhz)
			INIT_INI_ARRAY(&ah->iniModesAdditional,
			INIT_INI_ARRAY(&ah->iniAdditional,
					ar9331_1p1_xtal_25M,
					ARRAY_SIZE(ar9331_1p1_xtal_25M), 2);
		else
			INIT_INI_ARRAY(&ah->iniModesAdditional,
			INIT_INI_ARRAY(&ah->iniAdditional,
					ar9331_1p1_xtal_40M,
					ARRAY_SIZE(ar9331_1p1_xtal_40M), 2);
	} else if (AR_SREV_9330_12(ah)) {
@@ -140,11 +140,11 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)

		/* additional clock settings */
		if (ah->is_clk_25mhz)
			INIT_INI_ARRAY(&ah->iniModesAdditional,
			INIT_INI_ARRAY(&ah->iniAdditional,
					ar9331_1p2_xtal_25M,
					ARRAY_SIZE(ar9331_1p2_xtal_25M), 2);
		else
			INIT_INI_ARRAY(&ah->iniModesAdditional,
			INIT_INI_ARRAY(&ah->iniAdditional,
					ar9331_1p2_xtal_40M,
					ARRAY_SIZE(ar9331_1p2_xtal_40M), 2);
	} else if (AR_SREV_9340(ah)) {
@@ -194,12 +194,13 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
				ARRAY_SIZE(ar9340Modes_high_ob_db_tx_gain_table_1p0),
				5);

		INIT_INI_ARRAY(&ah->iniModesAdditional,
		INIT_INI_ARRAY(&ah->iniModesFastClock,
				ar9340Modes_fast_clock_1p0,
				ARRAY_SIZE(ar9340Modes_fast_clock_1p0),
				3);

		INIT_INI_ARRAY(&ah->iniModesAdditional_40M,
		if (!ah->is_clk_25mhz)
			INIT_INI_ARRAY(&ah->iniAdditional,
				       ar9340_1p0_radio_core_40M,
				       ARRAY_SIZE(ar9340_1p0_radio_core_40M),
				       2);
@@ -321,7 +322,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
				2);

		/* Fast clock modal settings */
		INIT_INI_ARRAY(&ah->iniModesAdditional,
		INIT_INI_ARRAY(&ah->iniModesFastClock,
				ar9462_modes_fast_clock_2p0,
				ARRAY_SIZE(ar9462_modes_fast_clock_2p0), 3);

@@ -378,7 +379,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
				ARRAY_SIZE(ar9580_1p0_low_ob_db_tx_gain_table),
				5);

		INIT_INI_ARRAY(&ah->iniModesAdditional,
		INIT_INI_ARRAY(&ah->iniModesFastClock,
				ar9580_1p0_modes_fast_clock,
				ARRAY_SIZE(ar9580_1p0_modes_fast_clock),
				3);
@@ -445,7 +446,7 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
				2);

		/* Fast clock modal settings */
		INIT_INI_ARRAY(&ah->iniModesAdditional,
		INIT_INI_ARRAY(&ah->iniModesFastClock,
				ar9300Modes_fast_clock_2p2,
				ARRAY_SIZE(ar9300Modes_fast_clock_2p2),
				3);
+4 −12
Original line number Diff line number Diff line
@@ -679,14 +679,10 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
	 * different modal values.
	 */
	if (IS_CHAN_A_FAST_CLOCK(ah, chan))
		REG_WRITE_ARRAY(&ah->iniModesAdditional,
		REG_WRITE_ARRAY(&ah->iniModesFastClock,
				modesIndex, regWrites);

	if (AR_SREV_9330(ah))
		REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);

	if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
		REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
	REG_WRITE_ARRAY(&ah->iniAdditional, 1, regWrites);

	if (AR_SREV_9462(ah))
		ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1);
@@ -1323,13 +1319,9 @@ static int ar9003_hw_fast_chan_change(struct ath_hw *ah,
	 * different modal values.
	 */
	if (IS_CHAN_A_FAST_CLOCK(ah, chan))
		REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites);

	if (AR_SREV_9330(ah))
		REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites);
		REG_WRITE_ARRAY(&ah->iniModesFastClock, modesIndex, regWrites);

	if (AR_SREV_9340(ah) && !ah->is_clk_25mhz)
		REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites);
	REG_WRITE_ARRAY(&ah->iniAdditional, 1, regWrites);

	ah->modes_index = modesIndex;
	*ini_reloaded = true;
+2 −2
Original line number Diff line number Diff line
@@ -827,8 +827,8 @@ struct ath_hw {
	struct ar5416IniArray iniAddac;
	struct ar5416IniArray iniPcieSerdes;
	struct ar5416IniArray iniPcieSerdesLowPower;
	struct ar5416IniArray iniModesAdditional;
	struct ar5416IniArray iniModesAdditional_40M;
	struct ar5416IniArray iniModesFastClock;
	struct ar5416IniArray iniAdditional;
	struct ar5416IniArray iniModesRxGain;
	struct ar5416IniArray iniModesTxGain;
	struct ar5416IniArray iniModes_9271_1_0_only;